[PATCH] D125206: [RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 9 13:37:37 PDT 2022

Previous message: [llvm] cce80bd - [SLP]Adjust assertion check for scalars in several insertelements.
Next message: [PATCH] D125206: [RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125206/new/

https://reviews.llvm.org/D125206

Previous message: [llvm] cce80bd - [SLP]Adjust assertion check for scalars in several insertelements.
Next message: [PATCH] D125206: [RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list