[PATCH] D122213: [RISCV] Enable MachineOutliner by default under -Oz for RISCV

[Wang Pengcheng via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG4ff5e8184c66: [RISCV] Enable MachineOutliner by default under -Oz for RISCV (authored by pcwang-thead).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122213/new/

https://reviews.llvm.org/D122213

Files:
  llvm/lib/Target/RISCV/CMakeLists.txt
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.h
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
  llvm/test/CodeGen/RISCV/O3-pipeline.ll

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