[PATCH] D124660: [RISCV][NFC] Use true_mask replace riscv_vmset_vl in defined patterns.
WangLian via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 4 20:06:20 PDT 2022
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8bb10436ab93: [RISCV][NFC] Use true_mask replace riscv_vmset_vl in defined patterns. (authored by Jimerlife).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D124660/new/
https://reviews.llvm.org/D124660
Files:
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
Index: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
@@ -691,19 +691,19 @@
(riscv_trunc_vector_vl
(op (wti.Vector wti.RegClass:$rs2),
(wti.Vector (extop (vti.Vector vti.RegClass:$rs1)))),
- (riscv_vmset_vl VLOpFrag),
+ (vti.Mask true_mask),
VLOpFrag)),
(!cast<Instruction>(instruction_name#"_WV_"#vti.LMul.MX)
- wti.RegClass:$rs2, vti.RegClass:$rs1, vti.AVL, vti.Log2SEW)>;
+ wti.RegClass:$rs2, vti.RegClass:$rs1, GPR:$vl, vti.Log2SEW)>;
def : Pat<
(vti.Vector
(riscv_trunc_vector_vl
(op (wti.Vector wti.RegClass:$rs2),
(wti.Vector (extop (vti.Vector (SplatPat GPR:$rs1))))),
- (riscv_vmset_vl VLOpFrag),
+ (vti.Mask true_mask),
VLOpFrag)),
(!cast<Instruction>(instruction_name#"_WX_"#vti.LMul.MX)
- wti.RegClass:$rs2, GPR:$rs1, vti.AVL, vti.Log2SEW)>;
+ wti.RegClass:$rs2, GPR:$rs1, GPR:$vl, vti.Log2SEW)>;
}
}
@@ -717,11 +717,10 @@
(vti.Vector
(riscv_trunc_vector_vl
(op (wti.Vector wti.RegClass:$rs2),
- (wti.Vector (SplatPat_uimm5 uimm5:$rs1))),
- (riscv_vmset_vl VLOpFrag),
+ (wti.Vector (SplatPat_uimm5 uimm5:$rs1))), (vti.Mask true_mask),
VLOpFrag)),
(!cast<Instruction>(instruction_name#"_WI_"#vti.LMul.MX)
- wti.RegClass:$rs2, uimm5:$rs1, vti.AVL, vti.Log2SEW)>;
+ wti.RegClass:$rs2, uimm5:$rs1, GPR:$vl, vti.Log2SEW)>;
}
}
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