[llvm] 8bb1043 - [RISCV][NFC] Use true_mask replace riscv_vmset_vl in defined patterns.
Lian Wang via llvm-commits
llvm-commits at lists.llvm.org
Wed May 4 20:06:14 PDT 2022
Author: Lian Wang
Date: 2022-05-05T03:05:52Z
New Revision: 8bb10436ab9383cb226153128cac9329db29e2d5
URL: https://github.com/llvm/llvm-project/commit/8bb10436ab9383cb226153128cac9329db29e2d5
DIFF: https://github.com/llvm/llvm-project/commit/8bb10436ab9383cb226153128cac9329db29e2d5.diff
LOG: [RISCV][NFC] Use true_mask replace riscv_vmset_vl in defined patterns.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D124660
Added:
Modified:
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
index 1c40413a3c939..8cafa97a8e20d 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
@@ -691,19 +691,19 @@ multiclass VPatBinarySDNodeExt_V_WV_WX<SDNode op, PatFrags extop, string instruc
(riscv_trunc_vector_vl
(op (wti.Vector wti.RegClass:$rs2),
(wti.Vector (extop (vti.Vector vti.RegClass:$rs1)))),
- (riscv_vmset_vl VLOpFrag),
+ (vti.Mask true_mask),
VLOpFrag)),
(!cast<Instruction>(instruction_name#"_WV_"#vti.LMul.MX)
- wti.RegClass:$rs2, vti.RegClass:$rs1, vti.AVL, vti.Log2SEW)>;
+ wti.RegClass:$rs2, vti.RegClass:$rs1, GPR:$vl, vti.Log2SEW)>;
def : Pat<
(vti.Vector
(riscv_trunc_vector_vl
(op (wti.Vector wti.RegClass:$rs2),
(wti.Vector (extop (vti.Vector (SplatPat GPR:$rs1))))),
- (riscv_vmset_vl VLOpFrag),
+ (vti.Mask true_mask),
VLOpFrag)),
(!cast<Instruction>(instruction_name#"_WX_"#vti.LMul.MX)
- wti.RegClass:$rs2, GPR:$rs1, vti.AVL, vti.Log2SEW)>;
+ wti.RegClass:$rs2, GPR:$rs1, GPR:$vl, vti.Log2SEW)>;
}
}
@@ -717,11 +717,10 @@ multiclass VPatBinarySDNode_V_WV_WX_WI<SDNode op, string instruction_name> {
(vti.Vector
(riscv_trunc_vector_vl
(op (wti.Vector wti.RegClass:$rs2),
- (wti.Vector (SplatPat_uimm5 uimm5:$rs1))),
- (riscv_vmset_vl VLOpFrag),
+ (wti.Vector (SplatPat_uimm5 uimm5:$rs1))), (vti.Mask true_mask),
VLOpFrag)),
(!cast<Instruction>(instruction_name#"_WI_"#vti.LMul.MX)
- wti.RegClass:$rs2, uimm5:$rs1, vti.AVL, vti.Log2SEW)>;
+ wti.RegClass:$rs2, uimm5:$rs1, GPR:$vl, vti.Log2SEW)>;
}
}
More information about the llvm-commits
mailing list