[PATCH] D124961: [riscv] Use X0 for destination of VSETVLI instruction if result unused

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D124961#3492309 <https://reviews.llvm.org/D124961#3492309>, @reames wrote:

> In D124961#3492285 <https://reviews.llvm.org/D124961#3492285>, @craig.topper wrote:
>
>>> Since after the core insertion/lowering algorithm has run, basically all user written VSETVLIs will have their GPR result unused (as VTYPE/VLEN is now explicitly read instead), this kicks in for most tests which involve a vsetvli intrinsic. When inserting VSETVLIs to lower psuedos, we prefer the X0 form anyways.
>>
>> Almost any real scenario that processes more data than fits in a register will need the GPR output to update memory pointers and to control a loop. Which I guess means we're lacking realistic tests.
>
> How so?  An idiomatic tail folded loop doesn't need to explicitly read VL.  It's passed via VL reg itself to all the vector ops.  It changes across iterations, but that doesn't mean the GPR is used.

Don't you need to know how many elements were processed to advance the pointer for the next iteration. That is done is scalar registers. You also need to update a remaining element count to be passed to the vsetvli for the next iteration. Assuming we're talking about a loop like this example from the spec

  A.1. Vector-vector add example
      # vector-vector add routine of 32-bit integers
      # void vvaddint32(size_t n, const int*x, const int*y, int*z)
      # { for (size_t i=0; i<n; i++) { z[i]=x[i]+y[i]; } }
      #
      # a0 = n, a1 = x, a2 = y, a3 = z
      # Non-vector instructions are indented
  vvaddint32:
      vsetvli t0, a0, e32, ta, ma  # Set vector length based on 32-bit vectors
  vle32.v v0, (a1)
    sub a0, a0, t0
    slli t0, t0, 2
    add a1, a1, t0
  vle32.v v1, (a2)
    add a2, a2, t0
  vadd.vv v2, v0, v1
  vse32.v v2, (a3)
    add a3, a3, t0
    bnez a0, vvaddint32
    ret


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