[PATCH] D120958: [TableGen] Add support for variable length instruction in decoder generator
Min-Yih Hsu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 3 19:33:11 PDT 2022
myhsu added a comment.
In D120958#3488799 <https://reviews.llvm.org/D120958#3488799>, @gregmiller wrote:
> Hello, We are maintaining a downstream version of the monorepo based on the LLVM main branch. In a recent attempt to merge the latest upstream commits
> into our monorepo we came across the following test failures after your commit.
> Any help would be greatly appreciated.
> Thanks
> Greg
>
> --------------------------------------------------------------------------------
>
> `
>
>
>
> FAIL: llvm_regressions :: LLVM/TableGen/VarLenDecoder.td
> --------------------------------------------------------------------------------
> Script:
> --
> : 'RUN: at line 1'; /scratch/gmiller/tools2/llvm_cgt/arm-llvm/RelWithAsserts/llvm/bin/llvm-tblgen -gen-disassembler -I /scratch/gmiller/tools2/llvm_cgt/llvm-project/llvm/test/TableGen/../../include /scratch/gmiller/tools2/llvm_cgt/llvm-project/llvm/test/TableGen/VarLenDecoder.td | /scratch/gmiller/tools2/llvm_cgt/arm-llvm/RelWithAsserts/llvm/bin/FileCheck /scratch/gmiller/tools2/llvm_cgt/llvm-project/llvm/test/TableGen/VarLenDecoder.td
> --
> Exit Code: 1
>
> Command Output (stderr):
> --
> + : 'RUN: at line 1'
> + /scratch/gmiller/tools2/llvm_cgt/arm-llvm/RelWithAsserts/llvm/bin/llvm-tblgen -gen-disassembler -I /scratch/gmiller/tools2/llvm_cgt/llvm-project/llvm/test/TableGen/../../include /scratch/gmiller/tools2/llvm_cgt/llvm-project/llvm/test/TableGen/VarLenDecoder.td
> + /scratch/gmiller/tools2/llvm_cgt/arm-llvm/RelWithAsserts/llvm/bin/FileCheck /scratch/gmiller/tools2/llvm_cgt/llvm-project/llvm/test/TableGen/VarLenDecoder.td
> /scratch/gmiller/tools2/llvm_cgt/llvm-project/llvm/test/TableGen/VarLenDecoder.td:50:16: error: CHECK-NEXT: expected string not found in input
> // CHECK-NEXT: MCD::OPC_Decode, 244, 1, 0, // Opcode: FOO16
> ^
> <stdin>:72:57: note: scanning from here
> /* 3 */ MCD::OPC_FilterValue, 8, 4, 0, 0, // Skip to: 12
> ^
> <stdin>:73:9: note: possible intended match here
> /* 8 */ MCD::OPC_Decode, 245, 1, 0, // Opcode: FOO16
> ^
>
> Input file: <stdin>
> Check file: /scratch/gmiller/tools2/llvm_cgt/llvm-project/llvm/test/TableGen/VarLenDecoder.td
>
> -dump-input=help explains the following input dump.
>
> Input was:
> <<<<<<
> .
> .
> .
> 67: field.insertBits(bits, startBit, numBits);
> 68: }
> 69:
> 70: static const uint8_t DecoderTable43[] = {
> 71: /* 0 */ MCD::OPC_ExtractField, 3, 5, // Inst{7-3} ...
> 72: /* 3 */ MCD::OPC_FilterValue, 8, 4, 0, 0, // Skip to: 12
> next:50'0 X error: no match found
> 73: /* 8 */ MCD::OPC_Decode, 245, 1, 0, // Opcode: FOO16
> next:50'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> next:50'1 ? possible intended match
> 74: /* 12 */ MCD::OPC_FilterValue, 9, 4, 0, 0, // Skip to: 21
> next:50'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 75: /* 17 */ MCD::OPC_Decode, 246, 1, 1, // Opcode: FOO32
> next:50'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 76: /* 21 */ MCD::OPC_Fail,
> next:50'0 ~~~~~~~~~~~~~~~~~~~~~~~~
> 77: 0
> next:50'0 ~~~
> 78: };
> next:50'0 ~~~
> .
> .
> .
> >>>>>>
>
> --
> `
>
>
Looks like the opcode of FOO16 and FOO32 are off by one. I think the number of pseudo opcodes is different (from the upstream one). Are `include/llvm/Support/TargetOpcodes.def` or `include/llvm/Target/Target.td` in your downstream repo different from upstream?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D120958/new/
https://reviews.llvm.org/D120958
More information about the llvm-commits
mailing list