[PATCH] D124824: [RISCV] Make use of SHXADD instructions in RVV spill/reload code.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 3 13:48:09 PDT 2022


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:1822
     else {
-      BuildMI(MBB, II, DL, TII->get(RISCV::ADDI), N)
+      BuildMI(MBB, II, DL, get(RISCV::ADDI), N)
           .addReg(RISCV::X0)
----------------
reames wrote:
> Aside: Shouldn't this simply be one of options inside movImm?
That's a good point. movImm probably handles this correctly.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124824/new/

https://reviews.llvm.org/D124824



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