[PATCH] D124824: [RISCV] Make use of SHXADD instructions in RVV spill/reload code.

[Philip Reames via Phabricator via llvm-commits]

reames accepted this revision.
reames added a comment.
This revision is now accepted and ready to land.

LGTM w/minor comments.



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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:1765
   MachineRegisterInfo &MRI = MF.getRegInfo();
-  const RISCVInstrInfo *TII = MF.getSubtarget<RISCVSubtarget>().getInstrInfo();
   int64_t NumOfVReg = Amount / 8;
----------------
Can you commit this separately as a cleanup please?


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:1822
     else {
-      BuildMI(MBB, II, DL, TII->get(RISCV::ADDI), N)
+      BuildMI(MBB, II, DL, get(RISCV::ADDI), N)
           .addReg(RISCV::X0)
----------------
Aside: Shouldn't this simply be one of options inside movImm?


Repository:
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  https://reviews.llvm.org/D124824/new/

https://reviews.llvm.org/D124824