[PATCH] D124231: [RISCV] Merge addi into load/store as there is a ADD between them
Hsiangkai Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 28 00:33:26 PDT 2022
HsiangKai updated this revision to Diff 425706.
HsiangKai added a comment.
Take the return value of UpdateNodeOperands().
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D124231/new/
https://reviews.llvm.org/D124231
Files:
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/test/CodeGen/RISCV/large-stack.ll
llvm/test/CodeGen/RISCV/mem.ll
llvm/test/CodeGen/RISCV/mem64.ll
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