[PATCH] D122769: [RISCV] Add a prepass to vsetvli insertion to propagate VLMAX vsetvli to the instructions.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 425596.
craig.topper added a comment.

More early outs.
Helper function for determining if it is a VLMAX vsetvli.
Restoring the comparison that the vsetvli and instruction have the same SEW/LMUL ratio.

Clearly I need more tests, the last version was missing a critical check.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122769/new/

https://reviews.llvm.org/D122769

Files:
  llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
  llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll

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