[PATCH] D123964: CodeGen: Replace some uses of LLVMTargetMachine with TargetMachine

Matthias Braun via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 26 20:17:56 PDT 2022


MatzeB added inline comments.


================
Comment at: llvm/include/llvm/Target/TargetMachine.h:137
+  /// registers, except that variadic defs will be allocated vregs.
+  virtual bool usesPhysRegsForValues() const { return true; }
+
----------------
arsenm wrote:
> echristo wrote:
> > I'm curious what this changes here versus using LLVMTargetMachine. It's been a while since I've looked.
> It doesn't really change anything, but this one doesn't fit the theme of the what LLVMTargetMachine adds. This is core target information and it doesn't make much since to have it in LLVMTargetMachine, which only adds pass machinery controls.
This seems like an implementation detail of `lib/CodeGen` so I think it should stay withint `LLVMTargetMachine`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123964/new/

https://reviews.llvm.org/D123964



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