[PATCH] D124450: [AMDGPU] Remove hasOneUse check from scalar select pattern

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

> I'd love this to go in, but when I added the `hasOneUse()` check it was certainly needed.  If my old notes serve me well there was a crash in ctlz.ll test and I concluded this check was needed to avoid some shenanigans in the si-fix-sgpr-copies. I need to double check if the issue has been fixed or is just hidden.

Since posting the patch I've found one out-of-tree case that fails to compile:

  ; RUN: llc -march=amdgcn -mcpu=gfx1030 < %s
  define amdgpu_cs void @main() {
  bb:
    %i = load i32, i32 addrspace(3)* null, align 16
    br label %bb1
  bb1:
    %i2 = phi i32 [ 0, %bb ], [ %i9, %bb5 ]
    br label %bb3
  bb3:
    %i4 = icmp eq i32 %i2, 0
    br i1 %i4, label %bb5, label %bb3
  bb5:
    %i6 = icmp ult i32 0, %i
    %i7 = sext i1 %i6 to i32
    %i8 = add i32 %i7, 1
    %i9 = and i32 %i8, %i7
    br label %bb1
  }

The DAG just before selection looks like this, with two uses of `t23`:

  t0: ch = EntryToken
    t3: i32,ch = load<(load (s32) from `i32 addrspace(3)* null`, align 16, addrspace 3)> t0, Constant:i32<0>, undef:i32
  t23: i1 = setcc t3, Constant:i32<0>, setne:ch
        t17: i32,i1 = subcarry Constant:i32<1>, Constant:i32<0>, t23
      t25: i32 = select t23, t17, Constant:i32<0>
    t11: ch = CopyToReg t0, Register:i32 %0, t25
    t13: ch = CopyToReg t0, Register:i32 %4, Constant:i32<0>
  t14: ch = TokenFactor t11, t13

After selection it has introduced a `CopyToReg` from `$scc` which I guess we don't support, because it will use SCC_CLASS which is not allocatable:

  t0: ch = EntryToken
  t1: i32 = S_MOV_B32 TargetConstant:i32<0>
      t29: i32 = V_MOV_B32_e32 TargetConstant:i32<0>
    t3: i32,ch = DS_READ_B32_gfx9<Mem:(load (s32) from `i32 addrspace(3)* null`, align 16, addrspace 3)> t29, TargetConstant:i16<0>, TargetConstant:i1<0>, t0
  t23: i1 = S_CMP_LG_U32 t3, t1
          t7: i32 = S_MOV_B32 TargetConstant:i32<1>
        t17: i32,i1 = S_SUB_CO_PSEUDO t7, t1, t23
        t27: ch,glue = CopyToReg t0, Register:i1 $scc, t23
      t25: i32 = S_CSELECT_B32 t17, t1, t27:1
    t11: ch = CopyToReg t0, Register:i32 %0, t25
    t13: ch = CopyToReg t0, Register:i32 %4, t1
  t14: ch = TokenFactor t11, t13

Shortly after this it crashes in `ScheduleDAGSDNodes::EmitPhysRegCopy` with: `MachineRegisterInfo.cpp:160: llvm::Register llvm::MachineRegisterInfo::createVirtualRegister(const llvm::TargetRegisterClass *, llvm::StringRef): Assertion 'RegClass->isAllocatable() && "Virtual register RegClass must be allocatable."' failed.`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124450/new/

https://reviews.llvm.org/D124450