[PATCH] D122769: [RISCV] Add a prepass to vsetvli insertion to propagate VLMAX vsetvli to the instructions.

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added a comment.

Not sure how I missed this, sorry



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Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:922
+          VSETVLIInfo UseInfo = computeInfoForInstr(UseMI, TSFlags, MRI);
+          Propagate = UseInfo.hasSameVLMAX(VI);
+        }
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Is there a reason not to propagate right away here and save us a boolean variable?


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Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:929
+
+      // TODO: Should we update the dead flag or remove the instruction if we
+      // propagated to all users?
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Good question. We aren't required to set `dead`, are we? From what I recall it can't be set if it's not true but can be left unset if it is true?


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Comment at: llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll:586
+
+; We should only need 1 vsetvli for this code.
+define void @vlmax(i64 %N, double* %c, double* %a, double* %b) {
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Could pre-commit this test so better show the effect?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D122769/new/

https://reviews.llvm.org/D122769