[PATCH] D124231: [RISCV] Merge addi into load/store as there is a ADD between them

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2102
+
+  // There is a ADD between ADDI and load/store.
+  SDValue Add;
----------------
craig.topper wrote:
> I don't think this is safe for W instructions. We would need to prove the sign extend done by the ADD*W doesn't alter the result of the addition.
You are right. I didn't think about it carefully. I will remove ADD*W in the conditions.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124231/new/

https://reviews.llvm.org/D124231