[PATCH] D124193: [AMDGPU] Add WWM reserved VGPRs to lane VGPRs list

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas created this revision.
cdevadas added reviewers: arsenm, rampitec, sebastian-ne.
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The custom VGPR spills inserted during frame lowering
maintain a separate list for WWM reserved registers.
Added them into the lane VGPRs list that already
tracks such reserved registers and unified the spill
insertion. This patch also defers the creation of stack
slots for WWM VGPRs until PrologEpilogInserter.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D124193

Files:
  llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
  llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
  llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
  llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp

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