[PATCH] D124163: AMDGPU/GlobalISel: Fix isVCC for uniform s1 with reg class on wave32

[Petar Avramovic via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGe06290e53f28: AMDGPU/GlobalISel: Fix isVCC for uniform s1 with reg class on wave32 (authored by Petar.Avramovic).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124163/new/

https://reviews.llvm.org/D124163

Files:
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/i1-copy.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-i1-copy.mir

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