[llvm] ac21337 - [InstCombine] Add nonpow2 (negative) test for D123374

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-04-21T13:58:43+01:00
New Revision: ac213375d9639974a29db99c5a9d145d2397385c

URL: https://github.com/llvm/llvm-project/commit/ac213375d9639974a29db99c5a9d145d2397385c
DIFF: https://github.com/llvm/llvm-project/commit/ac213375d9639974a29db99c5a9d145d2397385c.diff

LOG: [InstCombine] Add nonpow2 (negative) test for D123374

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/add-mask.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/add-mask.ll b/llvm/test/Transforms/InstCombine/add-mask.ll
index d0481f2720be7..b84c05995270b 100644
--- a/llvm/test/Transforms/InstCombine/add-mask.ll
+++ b/llvm/test/Transforms/InstCombine/add-mask.ll
@@ -70,6 +70,20 @@ define i32 @add_mask_ashr28_i32(i32 %x) {
   ret i32 %r
 }
 
+; negative case - mask isn't pow2
+define i32 @add_mask_ashr28_non_pow2_i32(i32 %x) {
+; CHECK-LABEL: @add_mask_ashr28_non_pow2_i32(
+; CHECK-NEXT:    [[A:%.*]] = ashr i32 [[X:%.*]], 28
+; CHECK-NEXT:    [[M:%.*]] = and i32 [[A]], 9
+; CHECK-NEXT:    [[R:%.*]] = add nsw i32 [[M]], [[A]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %a = ashr i32 %x, 28
+  %m = and i32 %a, 9
+  %r = add i32 %m, %a
+  ret i32 %r
+}
+
 ; negative case - insufficient sign bits
 define i32 @add_mask_ashr27_i32(i32 %x) {
 ; CHECK-LABEL: @add_mask_ashr27_i32(