[PATCH] D124144: [RISCV][SelectionDAG] Support VP_ADD/VP_MUL/VP_SUB mask operations
WangLian via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 20 20:25:46 PDT 2022
Jimerlife created this revision.
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I abandoned D124080 <https://reviews.llvm.org/D124080>. In initial SelectionDAG, use VP_XOR replace VP_ADD/VP_MUL/VP_SUB when operand type is mask.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D124144
Files:
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/test/CodeGen/RISCV/fixed-vectors-vadd-vp-mask.ll
llvm/test/CodeGen/RISCV/fixed-vectors-vmul-vp-mask.ll
llvm/test/CodeGen/RISCV/fixed-vectors-vsub-vp-mask.ll
llvm/test/CodeGen/RISCV/vadd-vp-mask.ll
llvm/test/CodeGen/RISCV/vmul-vp-mask.ll
llvm/test/CodeGen/RISCV/vsub-vp-mask.ll
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