[PATCH] D123964: CodeGen: Replace some uses of LLVMTargetMachine with TargetMachine

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/include/llvm/Target/TargetMachine.h:137
+  /// registers, except that variadic defs will be allocated vregs.
+  virtual bool usesPhysRegsForValues() const { return true; }
+
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echristo wrote:
> I'm curious what this changes here versus using LLVMTargetMachine. It's been a while since I've looked.
It doesn't really change anything, but this one doesn't fit the theme of the what LLVMTargetMachine adds. This is core target information and it doesn't make much since to have it in LLVMTargetMachine, which only adds pass machinery controls.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123964/new/

https://reviews.llvm.org/D123964