[PATCH] D123970: [RISCV] Add isCommutable to ADD/ADDW/MUL/AND/OR/XOR.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 423503.
craig.topper added a comment.

Include the Zb instructions that also use ALU_rr


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123970/new/

https://reviews.llvm.org/D123970

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoM.td
  llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

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