[llvm] c1c49a3 - [AMDGPU] Fix comment type in the DSInstructions.td. NFC.

[Stanislav Mekhanoshin via llvm-commits]

Author: Stanislav Mekhanoshin
Date: 2022-04-18T14:28:12-07:00
New Revision: c1c49a356162b22554088d269f7689bdb044a9f1

URL: https://github.com/llvm/llvm-project/commit/c1c49a356162b22554088d269f7689bdb044a9f1
DIFF: https://github.com/llvm/llvm-project/commit/c1c49a356162b22554088d269f7689bdb044a9f1.diff

LOG: [AMDGPU] Fix comment type in the DSInstructions.td. NFC.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/DSInstructions.td

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/DSInstructions.td b/llvm/lib/Target/AMDGPU/DSInstructions.td
index 1fb36991403ab..4e7a9b5a65cd8 100644
--- a/llvm/lib/Target/AMDGPU/DSInstructions.td
+++ b/llvm/lib/Target/AMDGPU/DSInstructions.td
@@ -885,9 +885,9 @@ defm : DSWritePat_mc <DS_WRITE_B96, vt, "store_local">;
 }
 
 // Select 128 bit loads and stores aligned less than 4 as a single ds_read_b128/
-// ds_write_b128 as a single instruction as this is faster than ds_read2_b64/
-// ds_write2_b64 which would be used otherwise. In this case a b64 access would
-// still be misaligned, but we will have 2 of them.
+// ds_write_b128 instruction as this is faster than ds_read2_b64/ds_write2_b64
+// which would be used otherwise. In this case a b64 access would still be
+// misaligned, but we will have 2 of them.
 foreach vt = VReg_128.RegTypes in {
 defm : DSReadPat_mc <DS_READ_B128, vt, "load_align_less_than_4_local">;
 defm : DSWritePat_mc <DS_WRITE_B128, vt, "store_align_less_than_4_local">;