[PATCH] D123764: [llvm-objdump] Implemented PrintBranchImmAsAddress for MIPS

[Dmitry Vassiliev via Phabricator via llvm-commits]

slydiman added inline comments.


================
Comment at: llvm/lib/Target/Mips/MicroMipsInstrInfo.td:1326
   def : MipsInstAlias<"wait", (WAIT_MM 0x0), 1>, ISA_MICROMIPS;
+  def : MipsInstAlias<"nop", (SLL ZERO, ZERO, 0), 1>, ISA_MICROMIPS;
   def : MipsInstAlias<"nop", (SLL_MM ZERO, ZERO, 0), 1>, ISA_MICROMIPS;
----------------
sdardis wrote:
> This line is incorrect or a spurious change. Placing this alias here would  (attempt to) produce a MIPS standard encoded instruction of `sll` rather than a microMIPS encoded instruction.
Note removing this line breakes the following tests:
```
llvm/test/MC/Mips/cprestore-noreorder.s
llvm/test/MC/Mips/micromips-fpu-instructions.s
llvm/test/MC/Mips/micromips-branch-fixup.s
llvm/test/MC/Mips/micromips-jump26.s
llvm/test/MC/Mips/micromips-16-bit-instructions.s
llvm/test/MC/Mips/micromips-jump-instructions.s
llvm/test/MC/Mips/micromips-branch-instructions.s
llvm/test/CodeGen/Mips/atomic.ll
llvm/test/CodeGen/Mips/llvm-ir/urem.ll
llvm/test/CodeGen/Mips/llvm-ir/srem.ll
llvm/test/CodeGen/Mips/llvm-ir/udiv.ll
llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll
llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll
llvm/test/CodeGen/Mips/longbranch.ll
llvm/test/CodeGen/Mips/blez_bgez.ll
llvm/test/CodeGen/Mips/micromips-mtc-mfc.ll
llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.ll
llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-lwp-swp.ll
llvm/test/CodeGen/Mips/pseudo-jump-fill.ll
```
`sll $zero, $zero, 0` instead of `nop` [0x00,0x00,0x00,0x00]


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D123764/new/

https://reviews.llvm.org/D123764