[llvm] 9196f5d - MachineCSE: Report this requires SSA

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 14 17:36:42 PDT 2022


Author: Matt Arsenault
Date: 2022-04-14T20:21:21-04:00
New Revision: 9196f5dab757cc2d2f59b5295140fb1f7f4354c2

URL: https://github.com/llvm/llvm-project/commit/9196f5dab757cc2d2f59b5295140fb1f7f4354c2
DIFF: https://github.com/llvm/llvm-project/commit/9196f5dab757cc2d2f59b5295140fb1f7f4354c2.diff

LOG: MachineCSE: Report this requires SSA

Added: 
    llvm/test/CodeGen/AMDGPU/machine-cse-ssa.mir

Modified: 
    llvm/lib/CodeGen/MachineCSE.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp
index 148947494355d..e60fd9f7883a8 100644
--- a/llvm/lib/CodeGen/MachineCSE.cpp
+++ b/llvm/lib/CodeGen/MachineCSE.cpp
@@ -90,6 +90,11 @@ namespace {
       AU.addPreserved<MachineBlockFrequencyInfo>();
     }
 
+    MachineFunctionProperties getRequiredProperties() const override {
+      return MachineFunctionProperties()
+        .set(MachineFunctionProperties::Property::IsSSA);
+    }
+
     void releaseMemory() override {
       ScopeMap.clear();
       PREMap.clear();

diff  --git a/llvm/test/CodeGen/AMDGPU/machine-cse-ssa.mir b/llvm/test/CodeGen/AMDGPU/machine-cse-ssa.mir
new file mode 100644
index 0000000000000..89b204d715ded
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/machine-cse-ssa.mir
@@ -0,0 +1,15 @@
+# REQUIRES: asserts
+# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=machine-cse -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
+
+# ERR: MachineFunctionProperties required by Machine Common Subexpression Elimination pass are not met by function not_ssa.
+# ERR-NEXT: Required properties: IsSSA
+# ERR-NEXT: Current properties: NoPHIs
+
+---
+name: not_ssa
+body: |
+  bb.0:
+    %0:sgpr_32 = S_MOV_B32 0
+    %0:sgpr_32 = S_MOV_B32 1
+    S_ENDPGM 0, implicit %0
+...


        


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