[PATCH] D122968: [AArch64][SelectionDAG] Add target-specific implementation of srem
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 13 11:02:56 PDT 2022
efriedma added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:4582
+ return OptimizedRem;
+ }
SDValue OptimizedDiv =
----------------
Do we need to do something special for something like the following, to match the existing handling for div/rem pairs? I guess it's only a couple instructions different either way, but maybe worth considering.
```
define void @sdivrem(i32 %x, i32* %ap, i32* %bp) {
%a = sdiv i32 %x, 4
%b = srem i32 %x, 4
store i32 %a, i32* %ap
store i32 %b, i32* %bp
ret void
}
```
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:23899
+/// Given an ISD::SREM node expressing a remainder by constant power of 2,
+/// return a DAG expression that will generate the same value by right shifting.
+SDValue DAGCombiner::BuildSREMPow2(SDNode *N) {
----------------
Fix this comment? Not sure how you compute srem "by right shifting"
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https://reviews.llvm.org/D122968/new/
https://reviews.llvm.org/D122968
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