[PATCH] D122918: [RISCV][CodeGen] Support float-arith in Zfinx
Hugh Perkins via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 13 02:41:17 PDT 2022
hughperkins added a comment.
Ok, I've since learned that this PR doesnt handle load/store. Only arithmetic.
However note that immediate float arithmetic also seems to be missing, e.g. the following crashes
; ModuleID = 'test.cpp'
source_filename = "test.cpp"
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx11.0.0"
; Function Attrs: mustprogress noinline nounwind optnone ssp uwtable
define noundef float @_Z4funcf(float noundef %0) #0 {
%2 = fadd float %0, 3.000000e+00
ret float %2
}
attributes #0 = { mustprogress noinline nounwind optnone ssp uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sahf,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"PIC Level", i32 2}
!2 = !{i32 7, !"uwtable", i32 1}
!3 = !{i32 7, !"frame-pointer", i32 2}
!4 = !{!"clang version 14.0.0 (https://github.com/tru/llvm-release-build fc075d7c96fe7c992dde351695a5d25fe084794a)"}
Compiled with:
bin/llc --march riscv32 -mattr +zfinx test_fadd_imm.ll
Gives:
LLVM ERROR: Cannot select: t15: f32,ch = load<(load (s32) from constant-pool)> t0, t19, undef:i32
t19: i32 = ADDI t18, TargetConstantPool:i32<float 3.000000e+00> 0 [TF=3]
t18: i32 = LUI TargetConstantPool:i32<float 3.000000e+00> 0 [TF=4]
t16: i32 = TargetConstantPool<float 3.000000e+00> 0 [TF=4]
t17: i32 = TargetConstantPool<float 3.000000e+00> 0 [TF=3]
t14: i32 = undef
In function: _Z4funcf
(but compiles ok with `+f`)
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D122918/new/
https://reviews.llvm.org/D122918
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