[llvm] 5a5034d - GlobalISel: Verify atomic load/store ordering restriction

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2022-04-11T20:12:22-04:00
New Revision: 5a5034d5081be4419ed464cc15d3af62426c0247

URL: https://github.com/llvm/llvm-project/commit/5a5034d5081be4419ed464cc15d3af62426c0247
DIFF: https://github.com/llvm/llvm-project/commit/5a5034d5081be4419ed464cc15d3af62426c0247.diff

LOG: GlobalISel: Verify atomic load/store ordering restriction

Reject acquire stores and release loads. This matches the restriction
imposed by the LLParser and IR verifier.

Added: 
    

Modified: 
    llvm/lib/CodeGen/MachineVerifier.cpp
    llvm/test/CodeGen/MIR/AArch64/atomic-memoperands.mir
    llvm/test/MachineVerifier/test_g_load.mir
    llvm/test/MachineVerifier/test_g_store.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 47fad5cd0697a..36e366351b5cb 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1073,6 +1073,18 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
         if (ValTy.getSizeInBytes() < MMO.getSize())
           report("store memory size cannot exceed value size", MI);
       }
+
+      const AtomicOrdering Order = MMO.getSuccessOrdering();
+      if (Opc == TargetOpcode::G_STORE) {
+        if (Order == AtomicOrdering::Acquire ||
+            Order == AtomicOrdering::AcquireRelease)
+          report("atomic store cannot use acquire ordering", MI);
+
+      } else {
+        if (Order == AtomicOrdering::Release ||
+            Order == AtomicOrdering::AcquireRelease)
+          report("atomic load cannot use release ordering", MI);
+      }
     }
 
     break;

diff  --git a/llvm/test/CodeGen/MIR/AArch64/atomic-memoperands.mir b/llvm/test/CodeGen/MIR/AArch64/atomic-memoperands.mir
index ad677d1dc2225..e832a5edcc236 100644
--- a/llvm/test/CodeGen/MIR/AArch64/atomic-memoperands.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/atomic-memoperands.mir
@@ -12,15 +12,17 @@ body: |
     ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load monotonic (s32))
     ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p0) :: (load acquire (s16))
     ; CHECK-NEXT: G_STORE [[LOAD2]](s16), [[COPY]](p0) :: (store release (s16))
-    ; CHECK-NEXT: G_STORE [[LOAD1]](s32), [[COPY]](p0) :: (store acq_rel (s32))
     ; CHECK-NEXT: G_STORE [[LOAD]](s64), [[COPY]](p0) :: (store syncscope("singlethread") seq_cst (s64))
+    ; CHECK-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(s64) = G_ATOMICRMW_ADD [[COPY]](p0), [[LOAD]] :: (load store acq_rel (s64))
+    ; CHECK-NEXT: [[ATOMICRMW_ADD1:%[0-9]+]]:_(s64) = G_ATOMICRMW_ADD [[COPY]](p0), [[LOAD]] :: (load store seq_cst (s64))
     ; CHECK-NEXT: RET_ReallyLR
     %0:_(p0) = COPY $x0
     %1:_(s64) = G_LOAD %0(p0) :: (load unordered (s64))
     %2:_(s32) = G_LOAD %0(p0) :: (load monotonic (s32))
     %3:_(s16) = G_LOAD %0(p0) :: (load acquire (s16))
     G_STORE %3(s16), %0(p0) :: (store release (s16))
-    G_STORE %2(s32), %0(p0) :: (store acq_rel (s32))
     G_STORE %1(s64), %0(p0) :: (store syncscope("singlethread") seq_cst (s64))
+    %4:_(s64) = G_ATOMICRMW_ADD %0, %1 :: (load store acq_rel (s64))
+    %5:_(s64) = G_ATOMICRMW_ADD %0, %1 :: (load store seq_cst (s64))
     RET_ReallyLR
 ...

diff  --git a/llvm/test/MachineVerifier/test_g_load.mir b/llvm/test/MachineVerifier/test_g_load.mir
index 81fbbfe67bb7a..fe39dbe0c71c6 100644
--- a/llvm/test/MachineVerifier/test_g_load.mir
+++ b/llvm/test/MachineVerifier/test_g_load.mir
@@ -20,4 +20,10 @@ body:             |
     ; CHECK: Bad machine code: load memory size cannot exceed result size
     %3:_(s8) = G_LOAD %2 :: (load (s16))
 
+    ; CHECK: Bad machine code: atomic load cannot use release ordering
+    %4:_(s32) = G_LOAD %2 :: (load release (s32))
+
+    ; CHECK: Bad machine code: atomic load cannot use release ordering
+    %5:_(s32) = G_LOAD %2 :: (load acq_rel (s32))
+
 ...

diff  --git a/llvm/test/MachineVerifier/test_g_store.mir b/llvm/test/MachineVerifier/test_g_store.mir
index e6ec032e36d3d..072e306c38edd 100644
--- a/llvm/test/MachineVerifier/test_g_store.mir
+++ b/llvm/test/MachineVerifier/test_g_store.mir
@@ -21,4 +21,10 @@ body:             |
     ; CHECK: Bad machine code: store memory size cannot exceed value size
     G_STORE %3, %2 :: (store (s16))
 
+    ; CHECK: Bad machine code: atomic store cannot use acquire ordering
+    G_STORE %1, %2 :: (store acquire (s32))
+
+    ; CHECK: Bad machine code: atomic store cannot use acquire ordering
+    G_STORE %1, %2 :: (store acq_rel (s32))
+
 ...