[llvm] c266e50 - [RISCV] Remove ExtZvl enum from RISCVSubtarget. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 11 10:15:14 PDT 2022


Author: Craig Topper
Date: 2022-04-11T10:01:17-07:00
New Revision: c266e504309fbbc5a7cf7c8e7bf4a70658c1dd91

URL: https://github.com/llvm/llvm-project/commit/c266e504309fbbc5a7cf7c8e7bf4a70658c1dd91
DIFF: https://github.com/llvm/llvm-project/commit/c266e504309fbbc5a7cf7c8e7bf4a70658c1dd91.diff

LOG: [RISCV] Remove ExtZvl enum from RISCVSubtarget. NFC

Having an enum with names that contain the string representation
of their value doesn't add any value. We can just use the numbers.

Reviewed By: kito-cheng, frasercrmck

Differential Revision: https://reviews.llvm.org/D123417

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCV.td
    llvm/lib/Target/RISCV/RISCVSubtarget.h

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCV.td b/llvm/lib/Target/RISCV/RISCV.td
index 2940fdf041923..3a4e52c5f73b5 100644
--- a/llvm/lib/Target/RISCV/RISCV.td
+++ b/llvm/lib/Target/RISCV/RISCV.td
@@ -334,13 +334,13 @@ def HasRVCHints : Predicate<"Subtarget->enableRVCHintInstrs()">,
                   AssemblerPredicate<(all_of(not FeatureNoRVCHints)),
                                       "RVC Hint Instructions">;
 
-def FeatureStdExtZvl32b : SubtargetFeature<"zvl32b", "ZvlLen", "ExtZvl::Zvl32b",
+def FeatureStdExtZvl32b : SubtargetFeature<"zvl32b", "ZvlLen", "32",
                        "'Zvl' (Minimum Vector Length) 32">;
 
 foreach i = { 6-15 } in {
     defvar I = !shl(1, i);
     def FeatureStdExtZvl#I#b :
-        SubtargetFeature<"zvl"#I#"b", "ZvlLen", "ExtZvl::Zvl"#I#"b",
+        SubtargetFeature<"zvl"#I#"b", "ZvlLen", !cast<string>(I),
                         "'Zvl' (Minimum Vector Length) "#I,
                         [!cast<SubtargetFeature>("FeatureStdExtZvl"#!srl(I, 1)#"b")]>;
 }

diff  --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h
index a63c07597a2ca..038dd2b1876af 100644
--- a/llvm/lib/Target/RISCV/RISCVSubtarget.h
+++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h
@@ -34,22 +34,6 @@ class StringRef;
 
 class RISCVSubtarget : public RISCVGenSubtargetInfo {
 public:
-  enum ExtZvl : unsigned {
-    NotSet = 0,
-    Zvl32b = 32,
-    Zvl64b = 64,
-    Zvl128b = 128,
-    Zvl256b = 256,
-    Zvl512b = 512,
-    Zvl1024b = 1024,
-    Zvl2048b = 2048,
-    Zvl4096b = 4096,
-    Zvl8192b = 8192,
-    Zvl16384b = 16384,
-    Zvl32768b = 32768,
-    Zvl65536b = 65536
-  };
-
   enum RISCVProcFamilyEnum : uint8_t {
     Others,
     SiFive7,
@@ -108,7 +92,7 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
   bool EnableRVCHintInstrs = true;
   bool EnableSaveRestore = false;
   unsigned XLen = 32;
-  ExtZvl ZvlLen = ExtZvl::NotSet;
+  unsigned ZvlLen = 0;
   MVT XLenVT = MVT::i32;
   uint8_t MaxInterleaveFactor = 2;
   RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown;
@@ -174,7 +158,7 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
   bool hasStdExtZbr() const { return HasStdExtZbr; }
   bool hasStdExtZbs() const { return HasStdExtZbs; }
   bool hasStdExtZbt() const { return HasStdExtZbt; }
-  bool hasStdExtZvl() const { return ZvlLen != ExtZvl::NotSet; }
+  bool hasStdExtZvl() const { return ZvlLen != 0; }
   bool hasStdExtZvfh() const { return HasStdExtZvfh; }
   bool hasStdExtZfhmin() const { return HasStdExtZfhmin; }
   bool hasStdExtZfh() const { return HasStdExtZfh; }
@@ -208,7 +192,7 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
     return 0;
   }
   unsigned getMinVLen() const { return ZvlLen; }
-  unsigned getMaxVLen() const { return Zvl65536b; }
+  unsigned getMaxVLen() const { return 65536; }
   unsigned getRealMinVLen() const {
     unsigned VLen = getMinRVVVectorSizeInBits();
     return VLen == 0 ? getMinVLen() : VLen;


        


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