[PATCH] D123406: [RISCV] Only try LUI+SHADD+ADDI for int materialization if LUI+ADDI+SHADD failed.

Fri Apr 8 17:44:55 PDT 2022

benshi001 accepted this revision.
benshi001 added a comment.
This revision is now accepted and ready to land.

Thanks for help me fix the assert failure. I really appreciate. :)

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123406/new/

https://reviews.llvm.org/D123406

[PATCH] D123406: [RISCV] Only try LUI+SH*ADD+ADDI for int materialization if LUI+ADDI+SH*ADD failed.