[PATCH] D123338: [AMDGPU] Fix handling of gfx10 LDS misaligned access bug
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 7 14:09:23 PDT 2022
arsenm added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir:4
# RUN: llc -amdgpu-global-isel-new-legality -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
-# RUN: llc -amdgpu-global-isel-new-legality -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX10 %s
+# RUN: llc -amdgpu-global-isel-new-legality -march=amdgcn -mcpu=gfx1010 -mattr=+cumode -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX10 %s
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Should this get a runline with and without cumode?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D123338/new/
https://reviews.llvm.org/D123338
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