[PATCH] D123163: [TLI] `TargetLowering::SimplifyDemandedVectorElts()`: narrowing bitcast: fill known zero elts from known src bits
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 6 01:51:02 PDT 2022
RKSimon added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:2771
+ for (unsigned SubElt = 0; SubElt != Scale; ++SubElt) {
+ if (!Known.Zero.extractBits(EltSizeInBits, SubElt * EltSizeInBits)
+ .isAllOnes())
----------------
Known is only guaranteed to be correct for the requested SrcDemandedBits/SrcDemandedElts - is that going to work in a different way to the DemandedElts check below? Sorry I haven't investigated properly yet, but we might have to check that we were demanding those src bits?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D123163/new/
https://reviews.llvm.org/D123163
More information about the llvm-commits
mailing list