[PATCH] D120026: [ARM] Fix ARM backend to correctly use atomic expansion routines.

Alan Phipps via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 4 13:33:06 PDT 2022


alanphipps added a comment.

In D120026#3424687 <https://reviews.llvm.org/D120026#3424687>, @efriedma wrote:

> By "the builtins", do you mean you're using compiler-rt with `-DCOMPILER_RT_EXCLUDE_ATOMIC_BUILTIN=Off`?  That implementation probably don't work on a Cortex-M0, unless you've hacked it somehow; it assumes width-1 lock-free atomics are available.

Yes, that's exactly what we're doing.  What should we be doing instead for Cortex-M0?  I don't know a lot about the history of this implementation, but if it doesn't work for M0, why is your change considered acceptable for M0?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120026/new/

https://reviews.llvm.org/D120026



More information about the llvm-commits mailing list