[llvm] 260679b - [NFCI] Regenerate LoopIdiomRecognize test checks
Dávid Bolvanský via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 3 15:21:35 PDT 2022
Author: Dávid Bolvanský
Date: 2022-04-04T00:21:26+02:00
New Revision: 260679b0008d37e52fb7d8572f480ac251dd7e0f
URL: https://github.com/llvm/llvm-project/commit/260679b0008d37e52fb7d8572f480ac251dd7e0f
DIFF: https://github.com/llvm/llvm-project/commit/260679b0008d37e52fb7d8572f480ac251dd7e0f.diff
LOG: [NFCI] Regenerate LoopIdiomRecognize test checks
Added:
Modified:
llvm/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll
llvm/test/Transforms/LoopIdiom/basic-address-space.ll
llvm/test/Transforms/LoopIdiom/basic.ll
llvm/test/Transforms/LoopIdiom/debug-line.ll
llvm/test/Transforms/LoopIdiom/disable-options.ll
llvm/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll
llvm/test/Transforms/LoopIdiom/memcpy-tbaa.ll
llvm/test/Transforms/LoopIdiom/memmove-tbaa.ll
llvm/test/Transforms/LoopIdiom/memset-tbaa.ll
llvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
llvm/test/Transforms/LoopIdiom/scev-invalidation.ll
llvm/test/Transforms/LoopIdiom/struct-custom-dl.ll
llvm/test/Transforms/LoopIdiom/struct.ll
llvm/test/Transforms/LoopIdiom/struct_pattern.ll
llvm/test/Transforms/LoopIdiom/unordered-atomic-memcpy-noarch.ll
llvm/test/Transforms/LoopIdiom/unroll-custom-dl.ll
llvm/test/Transforms/LoopIdiom/unroll.ll
llvm/test/Transforms/LoopIdiom/unsafe.ll
llvm/test/Transforms/LoopIdiom/unwind.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll b/llvm/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll
index a4207c86d5fe5..aa0793563dc70 100644
--- a/llvm/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll
+++ b/llvm/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -basic-aa -loop-idiom < %s -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
@@ -5,9 +6,22 @@ target triple = "x86_64-unknown-linux-gnu"
;; memcpy.atomic formation (atomic load & store)
define void @test1(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test1(
-; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %Dest, i8* align 1 %Base, i64 %Size, i32 1)
-; CHECK-NOT: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: [[DEST:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 [[DEST]], i8* align 1 [[BASE]], i64 [[SIZE:%.*]], i32 1)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i8, i8* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i8, i8* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i8, i8* [[I_0_014]] unordered, align 1
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i8, i32 10000
%Dest = alloca i8, i32 10000
@@ -30,9 +44,22 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation (atomic store, normal load)
define void @test2(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test2(
-; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %Dest, i8* align 1 %Base, i64 %Size, i32 1)
-; CHECK-NOT: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: [[DEST:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 [[DEST]], i8* align 1 [[BASE]], i64 [[SIZE:%.*]], i32 1)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i8, i8* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i8, i8* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load i8, i8* [[I_0_014]], align 1
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i8, i32 10000
%Dest = alloca i8, i32 10000
@@ -55,9 +82,22 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation (atomic store, normal load w/ no align)
define void @test2b(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test2b(
-; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %Dest, i8* align 1 %Base, i64 %Size, i32 1)
-; CHECK-NOT: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: [[DEST:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 [[DEST]], i8* align 1 [[BASE]], i64 [[SIZE:%.*]], i32 1)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i8, i8* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i8, i8* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load i8, i8* [[I_0_014]], align 1
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i8, i32 10000
%Dest = alloca i8, i32 10000
@@ -80,9 +120,22 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation rejection (atomic store, normal load w/ bad align)
define void @test2c(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test2c(
-; CHECK-NOT: call void @llvm.memcpy.element.unordered.atomic
-; CHECK: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i32, i32 10000, align 4
+; CHECK-NEXT: [[DEST:%.*]] = alloca i32, i32 10000, align 4
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i32, i32* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i32, i32* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[I_0_014]], align 2
+; CHECK-NEXT: store atomic i32 [[V]], i32* [[DESTI]] unordered, align 4
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE:%.*]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i32, i32 10000
%Dest = alloca i32, i32 10000
@@ -105,9 +158,22 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation rejection (atomic store w/ bad align, normal load)
define void @test2d(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test2d(
-; CHECK-NOT: call void @llvm.memcpy.element.unordered.atomic
-; CHECK: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i32, i32 10000, align 4
+; CHECK-NEXT: [[DEST:%.*]] = alloca i32, i32 10000, align 4
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i32, i32* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i32, i32* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[I_0_014]], align 4
+; CHECK-NEXT: store atomic i32 [[V]], i32* [[DESTI]] unordered, align 2
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE:%.*]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i32, i32 10000
%Dest = alloca i32, i32 10000
@@ -131,9 +197,22 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation (normal store, atomic load)
define void @test3(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test3(
-; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %Dest, i8* align 1 %Base, i64 %Size, i32 1)
-; CHECK-NOT: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: [[DEST:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 [[DEST]], i8* align 1 [[BASE]], i64 [[SIZE:%.*]], i32 1)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i8, i8* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i8, i8* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i8, i8* [[I_0_014]] unordered, align 1
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i8, i32 10000
%Dest = alloca i8, i32 10000
@@ -156,9 +235,22 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation rejection (normal store w/ no align, atomic load)
define void @test3b(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test3b(
-; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %Dest, i8* align 1 %Base, i64 %Size, i32 1)
-; CHECK-NOT: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: [[DEST:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 [[DEST]], i8* align 1 [[BASE]], i64 [[SIZE:%.*]], i32 1)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i8, i8* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i8, i8* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i8, i8* [[I_0_014]] unordered, align 1
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i8, i32 10000
%Dest = alloca i8, i32 10000
@@ -181,9 +273,22 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation rejection (normal store, atomic load w/ bad align)
define void @test3c(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test3c(
-; CHECK-NOT: call void @llvm.memcpy.element.unordered.atomic
-; CHECK: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i32, i32 10000, align 4
+; CHECK-NEXT: [[DEST:%.*]] = alloca i32, i32 10000, align 4
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i32, i32* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i32, i32* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i32, i32* [[I_0_014]] unordered, align 2
+; CHECK-NEXT: store i32 [[V]], i32* [[DESTI]], align 4
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE:%.*]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i32, i32 10000
%Dest = alloca i32, i32 10000
@@ -206,9 +311,22 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation rejection (normal store w/ bad align, atomic load)
define void @test3d(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test3d(
-; CHECK-NOT: call void @llvm.memcpy.element.unordered.atomic
-; CHECK: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i32, i32 10000, align 4
+; CHECK-NEXT: [[DEST:%.*]] = alloca i32, i32 10000, align 4
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i32, i32* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i32, i32* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i32, i32* [[I_0_014]] unordered, align 4
+; CHECK-NEXT: store i32 [[V]], i32* [[DESTI]], align 2
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE:%.*]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i32, i32 10000
%Dest = alloca i32, i32 10000
@@ -232,9 +350,22 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation rejection (atomic load, ordered-atomic store)
define void @test4(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test4(
-; CHECK-NOT: call void @llvm.memcpy.element.unordered.atomic
-; CHECK: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: [[DEST:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i8, i8* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i8, i8* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i8, i8* [[I_0_014]] unordered, align 1
+; CHECK-NEXT: store atomic i8 [[V]], i8* [[DESTI]] monotonic, align 1
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE:%.*]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i8, i32 10000
%Dest = alloca i8, i32 10000
@@ -257,9 +388,22 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation rejection (ordered-atomic load, unordered-atomic store)
define void @test5(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test5(
-; CHECK-NOT: call void @llvm.memcpy.element.unordered.atomic
-; CHECK: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: [[DEST:%.*]] = alloca i8, i32 10000, align 1
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i8, i8* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i8, i8* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i8, i8* [[I_0_014]] monotonic, align 1
+; CHECK-NEXT: store atomic i8 [[V]], i8* [[DESTI]] unordered, align 1
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE:%.*]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i8, i32 10000
%Dest = alloca i8, i32 10000
@@ -282,10 +426,25 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation (atomic load & store) -- element size 2
define void @test6(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test6(
-; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 1
-; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 2 %Dest{{[0-9]*}}, i8* align 2 %Base{{[0-9]*}}, i64 [[Sz]], i32 2)
-; CHECK-NOT: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i16, i32 10000, align 2
+; CHECK-NEXT: [[BASE2:%.*]] = bitcast i16* [[BASE]] to i8*
+; CHECK-NEXT: [[DEST:%.*]] = alloca i16, i32 10000, align 2
+; CHECK-NEXT: [[DEST1:%.*]] = bitcast i16* [[DEST]] to i8*
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[SIZE:%.*]], 1
+; CHECK-NEXT: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 2 [[DEST1]], i8* align 2 [[BASE2]], i64 [[TMP0]], i32 2)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i16, i16* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i16, i16* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i16, i16* [[I_0_014]] unordered, align 2
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i16, i32 10000
%Dest = alloca i16, i32 10000
@@ -308,10 +467,25 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation (atomic load & store) -- element size 4
define void @test7(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test7(
-; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 2
-; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 4 %Dest{{[0-9]*}}, i8* align 4 %Base{{[0-9]*}}, i64 [[Sz]], i32 4)
-; CHECK-NOT: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i32, i32 10000, align 4
+; CHECK-NEXT: [[BASE2:%.*]] = bitcast i32* [[BASE]] to i8*
+; CHECK-NEXT: [[DEST:%.*]] = alloca i32, i32 10000, align 4
+; CHECK-NEXT: [[DEST1:%.*]] = bitcast i32* [[DEST]] to i8*
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[SIZE:%.*]], 2
+; CHECK-NEXT: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 4 [[DEST1]], i8* align 4 [[BASE2]], i64 [[TMP0]], i32 4)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i32, i32* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i32, i32* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i32, i32* [[I_0_014]] unordered, align 4
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i32, i32 10000
%Dest = alloca i32, i32 10000
@@ -334,10 +508,25 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation (atomic load & store) -- element size 8
define void @test8(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test8(
-; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 3
-; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 8 %Dest{{[0-9]*}}, i8* align 8 %Base{{[0-9]*}}, i64 [[Sz]], i32 8)
-; CHECK-NOT: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i64, i32 10000, align 8
+; CHECK-NEXT: [[BASE2:%.*]] = bitcast i64* [[BASE]] to i8*
+; CHECK-NEXT: [[DEST:%.*]] = alloca i64, i32 10000, align 8
+; CHECK-NEXT: [[DEST1:%.*]] = bitcast i64* [[DEST]] to i8*
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[SIZE:%.*]], 3
+; CHECK-NEXT: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 8 [[DEST1]], i8* align 8 [[BASE2]], i64 [[TMP0]], i32 8)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i64, i64* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i64, i64* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i64, i64* [[I_0_014]] unordered, align 8
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i64, i32 10000
%Dest = alloca i64, i32 10000
@@ -360,10 +549,25 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation rejection (atomic load & store) -- element size 16
define void @test9(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test9(
-; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 4
-; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 16 %Dest{{[0-9]*}}, i8* align 16 %Base{{[0-9]*}}, i64 [[Sz]], i32 16)
-; CHECK-NOT: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i128, i32 10000, align 8
+; CHECK-NEXT: [[BASE2:%.*]] = bitcast i128* [[BASE]] to i8*
+; CHECK-NEXT: [[DEST:%.*]] = alloca i128, i32 10000, align 8
+; CHECK-NEXT: [[DEST1:%.*]] = bitcast i128* [[DEST]] to i8*
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[SIZE:%.*]], 4
+; CHECK-NEXT: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 16 [[DEST1]], i8* align 16 [[BASE2]], i64 [[TMP0]], i32 16)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i128, i128* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i128, i128* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i128, i128* [[I_0_014]] unordered, align 16
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i128, i32 10000
%Dest = alloca i128, i32 10000
@@ -386,9 +590,22 @@ for.end: ; preds = %for.body, %entry
;; memcpy.atomic formation rejection (atomic load & store) -- element size 32
define void @test10(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test10(
-; CHECK-NOT: call void @llvm.memcpy.element.unordered.atomic
-; CHECK: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i256, i32 10000, align 8
+; CHECK-NEXT: [[DEST:%.*]] = alloca i256, i32 10000, align 8
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i256, i256* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i256, i256* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i256, i256* [[I_0_014]] unordered, align 32
+; CHECK-NEXT: store atomic i256 [[V]], i256* [[DESTI]] unordered, align 32
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE:%.*]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i256, i32 10000
%Dest = alloca i256, i32 10000
@@ -413,9 +630,18 @@ for.end: ; preds = %for.body, %entry
; Make sure that atomic memset doesn't get recognized by mistake
define void @test_nomemset(i8* %Base, i64 %Size) nounwind ssp {
; CHECK-LABEL: @test_nomemset(
-; CHECK-NOT: call void @llvm.memset
-; CHECK: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i8, i8* [[BASE:%.*]], i64 [[INDVAR]]
+; CHECK-NEXT: store atomic i8 0, i8* [[I_0_014]] unordered, align 1
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE:%.*]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph: ; preds = %entry
br label %for.body
@@ -435,11 +661,18 @@ for.end: ; preds = %for.body, %entry
; This is a replica of test11_pattern from basic.ll
define void @test_nomemset_pattern(i32* nocapture %P) nounwind ssp {
; CHECK-LABEL: @test_nomemset_pattern(
-; CHECK-NEXT: entry:
-; CHECK-NOT: bitcast
-; CHECK-NOT: memset_pattern
-; CHECK: store atomic
-; CHECK: ret void
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDVAR]]
+; CHECK-NEXT: store atomic i32 1, i32* [[ARRAYIDX]] unordered, align 4
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], 10000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -459,10 +692,21 @@ for.end: ; preds = %for.body
; when looping with positive stride
define void @test_no_memcpy_memmove1(i8* %Src, i64 %Size) {
; CHECK-LABEL: @test_no_memcpy_memmove1(
-; CHECK-NOT: call void @llvm.memcpy.element.unordered.atomic
-; CHECK-NOT: call void @llvm.memmove.element.unordered.atomic
-; CHECK: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[STEP:%.*]] = add nuw nsw i64 [[INDVAR]], 1
+; CHECK-NEXT: [[SRCI:%.*]] = getelementptr i8, i8* [[SRC:%.*]], i64 [[STEP]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i8, i8* [[SRC]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load i8, i8* [[SRCI]], align 1
+; CHECK-NEXT: store atomic i8 [[V]], i8* [[DESTI]] unordered, align 1
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE:%.*]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
br label %for.body
@@ -485,10 +729,25 @@ for.end: ; preds = %for.body, %entry
; when looping with negative stride
define void @test_no_memcpy_memmove2(i8* %Src, i64 %Size) {
; CHECK-LABEL: @test_no_memcpy_memmove2(
-; CHECK-NOT: call void @llvm.memcpy.element.unordered.atomic
-; CHECK-NOT: call void @llvm.memmove.element.unordered.atomic
-; CHECK: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i64 [[SIZE:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[STEP:%.*]], [[FOR_BODY]] ], [ [[SIZE]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[STEP]] = add nsw i64 [[INDVAR]], -1
+; CHECK-NEXT: [[SRCI:%.*]] = getelementptr inbounds i8, i8* [[SRC:%.*]], i64 [[STEP]]
+; CHECK-NEXT: [[V:%.*]] = load i8, i8* [[SRCI]], align 1
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i64 [[INDVAR]]
+; CHECK-NEXT: store atomic i8 [[V]], i8* [[DESTI]] unordered, align 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp sgt i64 [[INDVAR]], 1
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%cmp1 = icmp sgt i64 %Size, 0
br i1 %cmp1, label %for.body, label %for.end
diff --git a/llvm/test/Transforms/LoopIdiom/basic-address-space.ll b/llvm/test/Transforms/LoopIdiom/basic-address-space.ll
index 936f314e36828..1737074328b15 100644
--- a/llvm/test/Transforms/LoopIdiom/basic-address-space.ll
+++ b/llvm/test/Transforms/LoopIdiom/basic-address-space.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -basic-aa -loop-idiom < %s -S | FileCheck %s
target datalayout = "e-p:32:32:32-p1:64:64:64-p2:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-n8:16:32:64"
@@ -6,10 +7,29 @@ target triple = "x86_64-apple-darwin10.0.0"
; Two dimensional nested loop should be promoted to one big memset.
define void @test10(i8 addrspace(2)* %X) nounwind ssp {
; CHECK-LABEL: @test10(
-; CHECK: entry:
-; CHECK-NEXT: call void @llvm.memset.p2i8.i16(i8 addrspace(2)* align 1 %X, i8 0, i16 10000, i1 false)
-; CHECK-NOT: store
-; CHECK: ret void
+; CHECK-NEXT: entry:
+; CHECK-NEXT: call void @llvm.memset.p2i8.i16(i8 addrspace(2)* align 1 [[X:%.*]], i8 0, i16 10000, i1 false)
+; CHECK-NEXT: br label [[BB_NPH:%.*]]
+; CHECK: bb.nph:
+; CHECK-NEXT: [[I_04:%.*]] = phi i16 [ 0, [[ENTRY:%.*]] ], [ [[INC12:%.*]], [[FOR_INC10:%.*]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = mul nuw nsw i16 [[I_04]], 100
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8 addrspace(2)* [[X]], i16 [[TMP0]]
+; CHECK-NEXT: br label [[FOR_BODY5:%.*]]
+; CHECK: for.body5:
+; CHECK-NEXT: [[J_02:%.*]] = phi i16 [ 0, [[BB_NPH]] ], [ [[INC:%.*]], [[FOR_BODY5]] ]
+; CHECK-NEXT: [[MUL:%.*]] = mul nsw i16 [[I_04]], 100
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i16 [[J_02]], [[MUL]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, i8 addrspace(2)* [[X]], i16 [[ADD]]
+; CHECK-NEXT: [[INC]] = add nsw i16 [[J_02]], 1
+; CHECK-NEXT: [[CMP4:%.*]] = icmp eq i16 [[INC]], 100
+; CHECK-NEXT: br i1 [[CMP4]], label [[FOR_INC10]], label [[FOR_BODY5]]
+; CHECK: for.inc10:
+; CHECK-NEXT: [[INC12]] = add nsw i16 [[I_04]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[INC12]], 100
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_END13:%.*]], label [[BB_NPH]]
+; CHECK: for.end13:
+; CHECK-NEXT: ret void
+;
entry:
br label %bb.nph
@@ -39,7 +59,18 @@ for.end13: ; preds = %for.inc10
define void @test11_pattern(i32 addrspace(2)* nocapture %P) nounwind ssp {
; CHECK-LABEL: @test11_pattern(
-; CHECK-NOT: memset_pattern
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32 addrspace(2)* [[P:%.*]], i64 [[INDVAR]]
+; CHECK-NEXT: store i32 1, i32 addrspace(2)* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], 10000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -62,10 +93,25 @@ for.end: ; preds = %for.body
define i32 @test14() nounwind {
; CHECK-LABEL: @test14(
-; CHECK: for.body:
-; CHECK: load i32
-; CHECK: store i32
-; CHECK: br i1 %cmp
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[TMP5:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 4
+; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[ADD]] to i64
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [7 x i32], [7 x i32] addrspace(2)* @g_50, i32 0, i64 [[IDXPROM]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32 addrspace(2)* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], 5
+; CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[ADD4]] to i64
+; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [7 x i32], [7 x i32] addrspace(2)* @g_50, i32 0, i64 [[IDXPROM5]]
+; CHECK-NEXT: store i32 [[TMP2]], i32 addrspace(2)* [[ARRAYIDX6]], align 4
+; CHECK-NEXT: [[INC]] = add nsw i32 [[TMP5]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], 2
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
+; CHECK: for.end:
+; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32 addrspace(2)* getelementptr inbounds ([7 x i32], [7 x i32] addrspace(2)* @g_50, i32 0, i64 6), align 4
+; CHECK-NEXT: ret i32 [[TMP8]]
+;
entry:
br label %for.body
diff --git a/llvm/test/Transforms/LoopIdiom/basic.ll b/llvm/test/Transforms/LoopIdiom/basic.ll
index 0bf4ad4f64958..1bd1dcb6e0d70 100644
--- a/llvm/test/Transforms/LoopIdiom/basic.ll
+++ b/llvm/test/Transforms/LoopIdiom/basic.ll
@@ -1119,7 +1119,7 @@ define void @loop_with_memcpy_PR46179_positive_stride(i8* %Src, i64 %Size) {
; CHECK-NEXT: [[SRCI:%.*]] = getelementptr i8, i8* [[SRC]], i64 [[STEP]]
; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i8, i8* [[SRC]], i64 [[INDVAR]]
; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE:%.*]]
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
; CHECK: for.end:
; CHECK-NEXT: ret void
@@ -1193,12 +1193,14 @@ define void @loop_with_memcpy_PR46179_negative_stride(i8* %Src, i64 %Size) {
; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64(i8* align 1 [[SCEVGEP]], i8* align 1 [[SRC]], i64 [[SIZE]], i1 false)
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[STEP]], [[FOR_BODY]] ], [ [[SIZE]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[STEP:%.*]] = add nsw i64 [[INDVAR]], -1
-; CHECK-NEXT: [[SRCI:%.*]] = getelementptr inbounds i8, i8* [[SRC:%.*]], i64 [[STEP]]
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[STEP:%.*]], [[FOR_BODY]] ], [ [[SIZE]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[STEP]] = add nsw i64 [[INDVAR]], -1
+; CHECK-NEXT: [[SRCI:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i64 [[STEP]]
; CHECK-NEXT: [[DESTI:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i64 [[INDVAR]]
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp sgt i64 [[INDVAR]], 1
-; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
; CHECK: for.end:
; CHECK-NEXT: ret void
;
@@ -1232,11 +1234,11 @@ define void @loop_with_memcpy_stride16(i8* %Src, i64 %Size) {
; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64(i8* align 1 [[SRC]], i8* align 1 [[SCEVGEP]], i64 [[TMP3]], i1 false)
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[STEP]], [[FOR_BODY]] ], [ 0, [[BB_NPH:%.*]] ]
-; CHECK-NEXT: [[STEP:%.*]] = add nuw nsw i64 [[INDVAR]], 16
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[STEP:%.*]], [[FOR_BODY]] ], [ 0, [[BB_NPH:%.*]] ]
+; CHECK-NEXT: [[STEP]] = add nuw nsw i64 [[INDVAR]], 16
; CHECK-NEXT: [[SRCI:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i64 [[STEP]]
; CHECK-NEXT: [[DESTI:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i64 [[INDVAR]]
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp slt i64 [[STEP]], [[SIZE:%.*]]
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp slt i64 [[STEP]], [[SIZE]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; CHECK: for.end:
; CHECK-NEXT: ret void
@@ -1336,15 +1338,17 @@ define void @do_not_form_memmove3(i8* %Src, i64 %Size) {
; CHECK: for.body.preheader:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT]], [[FOR_BODY]] ], [ [[SIZE]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ], [ [[SIZE]], [[FOR_BODY_PREHEADER]] ]
; CHECK-NEXT: [[STEP:%.*]] = add nuw nsw i64 [[INDVAR]], 1
; CHECK-NEXT: [[SRCI:%.*]] = getelementptr inbounds i8, i8* [[SRC:%.*]], i64 [[STEP]]
; CHECK-NEXT: [[V:%.*]] = load i8, i8* [[SRCI]], align 1
; CHECK-NEXT: [[DESTI:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i64 [[INDVAR]]
; CHECK-NEXT: store i8 [[V]], i8* [[DESTI]], align 1
-; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add nsw i64 [[INDVAR]], -1
+; CHECK-NEXT: [[INDVAR_NEXT]] = add nsw i64 [[INDVAR]], -1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp sgt i64 [[INDVAR]], 1
-; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
; CHECK: for.end:
; CHECK-NEXT: ret void
;
@@ -1376,14 +1380,16 @@ define void @do_not_form_memmove4(i8* %Src, i64 %Size) {
; CHECK: for.body.preheader:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT]], [[FOR_BODY]] ], [ [[SIZE]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ], [ [[SIZE]], [[FOR_BODY_PREHEADER]] ]
; CHECK-NEXT: [[STEP:%.*]] = add nuw nsw i64 [[INDVAR]], 1
; CHECK-NEXT: [[SRCI:%.*]] = getelementptr inbounds i8, i8* [[SRC:%.*]], i64 [[STEP]]
; CHECK-NEXT: [[DESTI:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i64 [[INDVAR]]
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[DESTI]], i8* align 1 [[SRCI]], i64 1, i1 false)
-; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add nsw i64 [[INDVAR]], -1
+; CHECK-NEXT: [[INDVAR_NEXT]] = add nsw i64 [[INDVAR]], -1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp sgt i64 [[INDVAR]], 1
-; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
; CHECK: for.end:
; CHECK-NEXT: ret void
;
@@ -1457,7 +1463,7 @@ define void @do_not_form_memmove6(i8* %Src, i64 %Size) {
; CHECK: for.body:
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[STEP:%.*]] = add nuw nsw i64 [[INDVAR]], 1
-; CHECK-NEXT: [[SRCI:%.*]] = getelementptr i8, i8* [[SRC:%.*]], i64 [[STEP]]
+; CHECK-NEXT: [[SRCI:%.*]] = getelementptr i8, i8* [[SRC]], i64 [[STEP]]
; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i8, i8* [[SRC]], i64 [[INDVAR]]
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[DESTI]], i8* align 1 [[SRCI]], i64 1, i1 false)
; CHECK-NEXT: store i8 4, i8* [[BASEALIAS]], align 1
diff --git a/llvm/test/Transforms/LoopIdiom/debug-line.ll b/llvm/test/Transforms/LoopIdiom/debug-line.ll
index b7d2c1d170578..2fb6dfeb3d87d 100644
--- a/llvm/test/Transforms/LoopIdiom/debug-line.ll
+++ b/llvm/test/Transforms/LoopIdiom/debug-line.ll
@@ -1,9 +1,27 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -loop-idiom < %s -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
define void @foo(double* nocapture %a) nounwind ssp !dbg !0 {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: tail call void @llvm.dbg.value(metadata double* [[A:%.*]], metadata [[META7:![0-9]+]], metadata !DIExpression()), !dbg [[DBG10:![0-9]+]]
+; CHECK-NEXT: tail call void @llvm.dbg.value(metadata i32 0, metadata [[META11:![0-9]+]], metadata !DIExpression()), !dbg [[DBG15:![0-9]+]]
+; CHECK-NEXT: [[A1:%.*]] = bitcast double* [[A]] to i8*
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[A1]], i8 0, i64 8000, i1 false), !dbg [[DBG16:![0-9]+]]
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr double, double* [[A]], i64 [[INDVAR]]
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVAR_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]], !dbg [[DBG15]]
+; CHECK: for.end:
+; CHECK-NEXT: tail call void @llvm.dbg.value(metadata [[META3:![0-9]+]], metadata [[META11]], metadata !DIExpression()), !dbg [[DBG17:![0-9]+]]
+; CHECK-NEXT: ret void, !dbg [[DBG18:![0-9]+]]
+;
entry:
tail call void @llvm.dbg.value(metadata double* %a, metadata !5, metadata !DIExpression()), !dbg !8
tail call void @llvm.dbg.value(metadata i32 0, metadata !10, metadata !DIExpression()), !dbg !14
@@ -12,7 +30,6 @@ entry:
for.body: ; preds = %entry, %for.body
%indvar = phi i64 [ 0, %entry ], [ %indvar.next, %for.body ]
%arrayidx = getelementptr double, double* %a, i64 %indvar
-; CHECK: call void @llvm.memset{{.+}} !dbg
store double 0.000000e+00, double* %arrayidx, align 8, !dbg !15
%indvar.next = add i64 %indvar, 1
%exitcond = icmp ne i64 %indvar.next, 1000
diff --git a/llvm/test/Transforms/LoopIdiom/disable-options.ll b/llvm/test/Transforms/LoopIdiom/disable-options.ll
index 0a19aebab7ee5..27c3e7d57efc2 100644
--- a/llvm/test/Transforms/LoopIdiom/disable-options.ll
+++ b/llvm/test/Transforms/LoopIdiom/disable-options.ll
@@ -112,6 +112,19 @@ define void @test-memset(i8* %Base, i64 %Size) nounwind ssp {
; CHECK: for.end:
; CHECK-NEXT: ret void
;
+; DIS-NONE-LABEL: @test-memset(
+; DIS-NONE-NEXT: bb.nph:
+; DIS-NONE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[BASE:%.*]], i8 0, i64 [[SIZE:%.*]], i1 false)
+; DIS-NONE-NEXT: br label [[FOR_BODY:%.*]]
+; DIS-NONE: for.body:
+; DIS-NONE-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; DIS-NONE-NEXT: [[I_0_014:%.*]] = getelementptr i8, i8* [[BASE]], i64 [[INDVAR]]
+; DIS-NONE-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; DIS-NONE-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]]
+; DIS-NONE-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; DIS-NONE: for.end:
+; DIS-NONE-NEXT: ret void
+;
; DIS-ALL-LABEL: @test-memset(
; DIS-ALL-NEXT: bb.nph:
; DIS-ALL-NEXT: br label [[FOR_BODY:%.*]]
diff --git a/llvm/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll b/llvm/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll
index 418235c780be5..15edc4a92c821 100644
--- a/llvm/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll
+++ b/llvm/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll
@@ -30,27 +30,27 @@ target triple = "x86_64-unknown-linux-gnu"
define void @test6_dest_align(i32* noalias align 1 %Base, i32* noalias align 4 %Dest, i64 %Size) nounwind ssp {
; CHECK-LABEL: @test6_dest_align(
; CHECK-NEXT: bb.nph:
-; CHECK-NEXT: [[DEST1:%.*]] = bitcast i32* [[DEST:%.*]] to i8*
-; CHECK-NEXT: [[BASE2:%.*]] = bitcast i32* [[BASE:%.*]] to i8*
-; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[SIZE:%.*]], 2, !dbg !18
-; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[DEST1]], i8* align 1 [[BASE2]], i64 [[TMP0]], i1 false), !dbg !19
-; CHECK-NEXT: br label [[FOR_BODY:%.*]], !dbg !18
+; CHECK-NEXT: [[DEST1:%.*]] = bitcast i32* [[DEST:%.*]] to i8*, !dbg [[DBG18:![0-9]+]]
+; CHECK-NEXT: [[BASE2:%.*]] = bitcast i32* [[BASE:%.*]] to i8*, !dbg [[DBG18]]
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[SIZE:%.*]], 2, !dbg [[DBG18]]
+; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[DEST1]], i8* align 1 [[BASE2]], i64 [[TMP0]], i1 false), !dbg [[DBG19:![0-9]+]]
+; CHECK-NEXT: br label [[FOR_BODY:%.*]], !dbg [[DBG18]]
; CHECK: for.body:
-; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ], !dbg !20
-; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 [[INDVAR]], metadata !9, metadata !DIExpression()), !dbg !20
-; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i32, i32* [[BASE]], i64 [[INDVAR]], !dbg !21
-; CHECK-NEXT: call void @llvm.dbg.value(metadata i32* [[I_0_014]], metadata !11, metadata !DIExpression()), !dbg !21
-; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i32, i32* [[DEST]], i64 [[INDVAR]], !dbg !22
-; CHECK-NEXT: call void @llvm.dbg.value(metadata i32* [[DESTI]], metadata !12, metadata !DIExpression()), !dbg !22
-; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[I_0_014]], align 1, !dbg !23
-; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 [[V]], metadata !13, metadata !DIExpression()), !dbg !23
-; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1, !dbg !24
-; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 [[INDVAR_NEXT]], metadata !15, metadata !DIExpression()), !dbg !24
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]], !dbg !25
-; CHECK-NEXT: call void @llvm.dbg.value(metadata i1 [[EXITCOND]], metadata !16, metadata !DIExpression()), !dbg !25
-; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !dbg !26
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ], !dbg [[DBG20:![0-9]+]]
+; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 [[INDVAR]], metadata [[META9:![0-9]+]], metadata !DIExpression()), !dbg [[DBG20]]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i32, i32* [[BASE]], i64 [[INDVAR]], !dbg [[DBG21:![0-9]+]]
+; CHECK-NEXT: call void @llvm.dbg.value(metadata i32* [[I_0_014]], metadata [[META11:![0-9]+]], metadata !DIExpression()), !dbg [[DBG21]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i32, i32* [[DEST]], i64 [[INDVAR]], !dbg [[DBG22:![0-9]+]]
+; CHECK-NEXT: call void @llvm.dbg.value(metadata i32* [[DESTI]], metadata [[META12:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22]]
+; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[I_0_014]], align 1, !dbg [[DBG23:![0-9]+]]
+; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 [[V]], metadata [[META13:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23]]
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1, !dbg [[DBG24:![0-9]+]]
+; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 [[INDVAR_NEXT]], metadata [[META15:![0-9]+]], metadata !DIExpression()), !dbg [[DBG24]]
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE]], !dbg [[DBG25:![0-9]+]]
+; CHECK-NEXT: call void @llvm.dbg.value(metadata i1 [[EXITCOND]], metadata [[META16:![0-9]+]], metadata !DIExpression()), !dbg [[DBG25]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !dbg [[DBG26:![0-9]+]]
; CHECK: for.end:
-; CHECK-NEXT: ret void, !dbg !27
+; CHECK-NEXT: ret void, !dbg [[DBG27:![0-9]+]]
;
bb.nph:
br label %for.body
diff --git a/llvm/test/Transforms/LoopIdiom/memcpy-tbaa.ll b/llvm/test/Transforms/LoopIdiom/memcpy-tbaa.ll
index 5bb8131070d60..e3bb6b6280016 100644
--- a/llvm/test/Transforms/LoopIdiom/memcpy-tbaa.ll
+++ b/llvm/test/Transforms/LoopIdiom/memcpy-tbaa.ll
@@ -42,8 +42,7 @@ define void @looperBadMerge(double* noalias nocapture readonly %M, double* noali
; CHECK-NEXT: entry:
; CHECK-NEXT: [[OUT1:%.*]] = bitcast double* [[OUT:%.*]] to i8*
; CHECK-NEXT: [[M2:%.*]] = bitcast double* [[M:%.*]] to i8*
-; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[M2]], i64 256, i1 false), !tbaa [[TBAAF:![0-9]+]]
-; CHECK-NOT: tbaa
+; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[M2]], i64 256, i1 false), !tbaa [[TBAA4:![0-9]+]]
; CHECK-NEXT: br label [[FOR_BODY4:%.*]]
; CHECK: for.body4:
; CHECK-NEXT: [[J_020:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY4]] ]
@@ -79,7 +78,6 @@ define void @looperGoodMerge(double* noalias nocapture readonly %M, double* noal
; CHECK-NEXT: [[OUT1:%.*]] = bitcast double* [[OUT:%.*]] to i8*
; CHECK-NEXT: [[M2:%.*]] = bitcast double* [[M:%.*]] to i8*
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[M2]], i64 256, i1 false)
-; CHECK-NOT: !tbaa
; CHECK-NEXT: br label [[FOR_BODY4:%.*]]
; CHECK: for.body4:
; CHECK-NEXT: [[J_020:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY4]] ]
@@ -113,8 +111,19 @@ define void @looperConstantTBAAStruct(double* nocapture noalias %out, double* no
; CHECK-LABEL: @looperConstantTBAAStruct(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[OUT1:%.*]] = bitcast double* [[OUT:%.*]] to i8*
-; CHECK-NEXT: [[IN1:%.*]] = bitcast double* [[IN:%.*]] to i8*
-; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[IN1]], i64 32, i1 false), !tbaa [[TBAA8:![0-9]+]]
+; CHECK-NEXT: [[IN2:%.*]] = bitcast double* [[IN:%.*]] to i8*
+; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[IN2]], i64 32, i1 false), !tbaa [[TBAA5:![0-9]+]]
+; CHECK-NEXT: br label [[FOR_BODY4:%.*]]
+; CHECK: for.body4:
+; CHECK-NEXT: [[J_020:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY4]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[IN]], i64 [[J_020]]
+; CHECK-NEXT: [[A0:%.*]] = load double, double* [[ARRAYIDX]], align 8, !tbaa [[TBAA9:![0-9]+]]
+; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[OUT]], i64 [[J_020]]
+; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[J_020]], 1
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i64 [[J_020]], 3
+; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY4]], label [[FOR_COND_CLEANUP:%.*]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body4
@@ -137,12 +146,21 @@ define void @looperVarTBAAStruct(double* nocapture noalias %out, double* nocaptu
; CHECK-LABEL: @looperVarTBAAStruct(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[OUT1:%.*]] = bitcast double* [[OUT:%.*]] to i8*
-; CHECK-NEXT: [[IN1:%.*]] = bitcast double* [[IN:%.*]] to i8*
-; CHECK-NEXT: [[umax:%.*]] = call i64 @llvm.umax.i64(i64 %len, i64 1)
-; CHECK-NEXT: [[I0:%.*]] = shl nuw i64 [[umax]], 3
-; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[IN1]], i64 [[I0]], i1 false)
-; CHECK-NOT: !tbaa
-; CHECK-NEXT: br
+; CHECK-NEXT: [[IN2:%.*]] = bitcast double* [[IN:%.*]] to i8*
+; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[LEN:%.*]], i64 1)
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[UMAX]], 3
+; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[IN2]], i64 [[TMP0]], i1 false)
+; CHECK-NEXT: br label [[FOR_BODY4:%.*]]
+; CHECK: for.body4:
+; CHECK-NEXT: [[J_020:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY4]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[IN]], i64 [[J_020]]
+; CHECK-NEXT: [[A0:%.*]] = load double, double* [[ARRAYIDX]], align 8, !tbaa [[TBAA9]]
+; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[OUT]], i64 [[J_020]]
+; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[J_020]], 1
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i64 [[INC]], [[LEN]]
+; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY4]], label [[FOR_COND_CLEANUP:%.*]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body4
@@ -162,15 +180,7 @@ for.cond.cleanup: ; preds = %for.cond.cleanup3
}
-; CHECK: [[TBAA0]] = !{[[TBAA1:.+]], [[TBAA1]], i64 0}
-; CHECK: [[TBAA1]] = !{!"double", [[TBAA2:.+]], i64 0}
-; CHECK: [[TBAA2]] = !{!"omnipotent char", [[TBAA3:.+]], i64 0}
-; CHECK: [[TBAAF]] = !{[[TBAA2]], [[TBAA2]], i64 0}
-; CHECK: [[TBAA8]] = !{[[TBAA5:.+]], [[TBAA6:.+]], i64 0, i64 32}
-; CHECK: [[TBAA5]] = !{[[TBAA7:.+]], i64 32, !"_ZTS1A", [[TBAA6]], i64 0, i64 8, [[TBAA6]], i64 8, i64 8, [[TBAA6]], i64 16, i64 8, [[TBAA6]], i64 24, i64 8}
-; CHECK: [[TBAA7]] = !{[[TBAA3]], i64 0, !"omnipotent char"}
-; CHECK: [[TBAA6]] = !{[[TBAA7]], i64 8, !"double"}
!3 = !{!4, !4, i64 0}
!4 = !{!"float", !7, i64 0}
diff --git a/llvm/test/Transforms/LoopIdiom/memmove-tbaa.ll b/llvm/test/Transforms/LoopIdiom/memmove-tbaa.ll
index 5e6b36e843901..6639ab5765350 100644
--- a/llvm/test/Transforms/LoopIdiom/memmove-tbaa.ll
+++ b/llvm/test/Transforms/LoopIdiom/memmove-tbaa.ll
@@ -5,9 +5,20 @@ define void @looper(double* nocapture %out) {
; CHECK-LABEL: @looper(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[OUT1:%.*]] = bitcast double* [[OUT:%.*]] to i8*
-; CHECK-NEXT: [[M:%.*]] = getelementptr double, double* %out, i32 16
+; CHECK-NEXT: [[M:%.*]] = getelementptr double, double* [[OUT]], i32 16
; CHECK-NEXT: [[M2:%.*]] = bitcast double* [[M]] to i8*
; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[M2]], i64 256, i1 false), !tbaa [[TBAA0:![0-9]+]]
+; CHECK-NEXT: br label [[FOR_BODY4:%.*]]
+; CHECK: for.body4:
+; CHECK-NEXT: [[J_020:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY4]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[M]], i64 [[J_020]]
+; CHECK-NEXT: [[A0:%.*]] = load double, double* [[ARRAYIDX]], align 8, !tbaa [[TBAA0]]
+; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[OUT]], i64 [[J_020]]
+; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[J_020]], 1
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i64 [[J_020]], 31
+; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY4]], label [[FOR_COND_CLEANUP:%.*]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: ret void
;
entry:
%M = getelementptr double, double* %out, i32 16
@@ -32,10 +43,20 @@ define void @looperBadMerge(double* nocapture %out) {
; CHECK-LABEL: @looperBadMerge(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[OUT1:%.*]] = bitcast double* [[OUT:%.*]] to i8*
-; CHECK-NEXT: [[M:%.*]] = getelementptr double, double* %out, i32 16
+; CHECK-NEXT: [[M:%.*]] = getelementptr double, double* [[OUT]], i32 16
; CHECK-NEXT: [[M2:%.*]] = bitcast double* [[M]] to i8*
-; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[M2]], i64 256, i1 false), !tbaa [[TBAAF:![0-9]+]]
+; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[M2]], i64 256, i1 false), !tbaa [[TBAA4:![0-9]+]]
; CHECK-NEXT: br label [[FOR_BODY4:%.*]]
+; CHECK: for.body4:
+; CHECK-NEXT: [[J_020:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY4]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[M]], i64 [[J_020]]
+; CHECK-NEXT: [[A0:%.*]] = load double, double* [[ARRAYIDX]], align 8, !tbaa [[TBAA0]]
+; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[OUT]], i64 [[J_020]]
+; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[J_020]], 1
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i64 [[J_020]], 31
+; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY4]], label [[FOR_COND_CLEANUP:%.*]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: ret void
;
entry:
%M = getelementptr double, double* %out, i32 16
@@ -59,11 +80,20 @@ define void @looperGoodMerge(double* nocapture %out) {
; CHECK-LABEL: @looperGoodMerge(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[OUT1:%.*]] = bitcast double* [[OUT:%.*]] to i8*
-; CHECK-NEXT: [[M:%.*]] = getelementptr double, double* %out, i32 16
+; CHECK-NEXT: [[M:%.*]] = getelementptr double, double* [[OUT]], i32 16
; CHECK-NEXT: [[M2:%.*]] = bitcast double* [[M]] to i8*
-; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[M2]], i64 256, i1 false)
-; CHECK-NOT: !tbaa
+; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64(i8* align 8 [[OUT1]], i8* align 8 [[M2]], i64 256, i1 false)
; CHECK-NEXT: br label [[FOR_BODY4:%.*]]
+; CHECK: for.body4:
+; CHECK-NEXT: [[J_020:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY4]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[M]], i64 [[J_020]]
+; CHECK-NEXT: [[A0:%.*]] = load double, double* [[ARRAYIDX]], align 8, !tbaa [[TBAA0]]
+; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[OUT]], i64 [[J_020]]
+; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[J_020]], 1
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i64 [[J_020]], 31
+; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY4]], label [[FOR_COND_CLEANUP:%.*]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: ret void
;
entry:
%M = getelementptr double, double* %out, i32 16
@@ -83,10 +113,6 @@ for.cond.cleanup: ; preds = %for.cond.cleanup3
ret void
}
-; CHECK: [[TBAA0]] = !{[[TBAA1:.+]], [[TBAA1]], i64 0}
-; CHECK: [[TBAA1]] = !{!"double", [[TBAA2:.+]], i64 0}
-; CHECK: [[TBAA2]] = !{!"omnipotent char", [[TBAA3:.+]], i64 0}
-; CHECK: [[TBAAF]] = !{[[TBAA2]], [[TBAA2]], i64 0}
!3 = !{!4, !4, i64 0}
!4 = !{!"float", !7, i64 0}
diff --git a/llvm/test/Transforms/LoopIdiom/memset-tbaa.ll b/llvm/test/Transforms/LoopIdiom/memset-tbaa.ll
index bc031413dc638..0233e0f3fa0e7 100644
--- a/llvm/test/Transforms/LoopIdiom/memset-tbaa.ll
+++ b/llvm/test/Transforms/LoopIdiom/memset-tbaa.ll
@@ -10,11 +10,11 @@ define dso_local void @double_memset(i8* nocapture %p) {
; CHECK: for.cond.cleanup:
; CHECK-NEXT: ret void
; CHECK: for.body:
-; CHECK-NEXT: [[I_07:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, %entry ]
-; CHECK-NEXT: [[INCDEC_PTR1:.+]] = getelementptr inbounds i8, i8* [[P]], i64 [[I_07]]
+; CHECK-NEXT: [[I_07:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[PTR1:%.*]] = getelementptr inbounds i8, i8* [[P]], i64 [[I_07]]
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_07]], 1
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], 16
-; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[FOR_BODY]]
+; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
;
entry:
br label %for.body
@@ -35,16 +35,16 @@ for.body:
define dso_local void @struct_memset(i8* nocapture %p) {
; CHECK-LABEL: @struct_memset(
; CHECK-NEXT: entry:
-; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[P:%.*]], i8 0, i64 16, i1 false), !tbaa [[TBAA8:![0-9]+]]
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[P:%.*]], i8 0, i64 16, i1 false), !tbaa [[TBAA4:![0-9]+]]
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.cond.cleanup:
; CHECK-NEXT: ret void
; CHECK: for.body:
-; CHECK-NEXT: [[I_07:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, %entry ]
-; CHECK-NEXT: [[INCDEC_PTR1:.+]] = getelementptr inbounds i8, i8* [[P]], i64 [[I_07]]
+; CHECK-NEXT: [[I_07:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[PTR1:%.*]] = getelementptr inbounds i8, i8* [[P]], i64 [[I_07]]
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_07]], 1
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], 16
-; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[FOR_BODY]]
+; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
;
entry:
br label %for.body
@@ -64,17 +64,16 @@ for.body:
define dso_local void @var_memset(i8* nocapture %p, i64 %len) {
; CHECK-LABEL: @var_memset(
; CHECK-NEXT: entry:
-; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[P:%.*]], i8 0, i64 %len, i1 false)
-; CHECK-NOT: !tbaa
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[P:%.*]], i8 0, i64 [[LEN:%.*]], i1 false)
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.cond.cleanup:
; CHECK-NEXT: ret void
; CHECK: for.body:
-; CHECK-NEXT: [[I_07:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, %entry ]
-; CHECK-NEXT: [[INCDEC_PTR1:.+]] = getelementptr inbounds i8, i8* [[P]], i64 [[I_07]]
+; CHECK-NEXT: [[I_07:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[PTR1:%.*]] = getelementptr inbounds i8, i8* [[P]], i64 [[I_07]]
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_07]], 1
-; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], %len
-; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[FOR_BODY]]
+; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[LEN]]
+; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
;
entry:
br label %for.body
@@ -98,19 +97,19 @@ define dso_local void @adjacent_store_memset(%struct.A* nocapture %a, i64 %len)
; CHECK-LABEL: @adjacent_store_memset(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A1:%.*]] = bitcast %struct.A* [[A:%.*]] to i8*
-; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 %len, i64 1)
-; CHECK-NEXT: [[LEN:%.*]] = shl nuw i64 [[UMAX]], 4
-; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[A1]], i8 0, i64 [[LEN]], i1 false), !tbaa [[TBAA9:![0-9]+]]
+; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[LEN:%.*]], i64 1)
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[UMAX]], 4
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[A1]], i8 0, i64 [[TMP0]], i1 false), !tbaa [[TBAA8:![0-9]+]]
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.cond.cleanup:
; CHECK-NEXT: ret void
; CHECK: for.body:
-; CHECK-NEXT: [[I_09:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, %entry ]
-; CHECK-NEXT: %p = getelementptr inbounds %struct.A, %struct.A* [[A]], i64 [[I_09]], i32 0
-; CHECK-NEXT: %p2 = getelementptr inbounds %struct.A, %struct.A* [[A]], i64 [[I_09]], i32 1, i32 0
+; CHECK-NEXT: [[I_09:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[P:%.*]] = getelementptr inbounds [[STRUCT_A:%.*]], %struct.A* [[A]], i64 [[I_09]], i32 0
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds [[STRUCT_A]], %struct.A* [[A]], i64 [[I_09]], i32 1, i32 0
; CHECK-NEXT: [[INC]] = add i64 [[I_09]], 1
-; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp ult i64 [[INC]], %len
-; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INC]], [[LEN]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
;
entry:
br label %for.body
@@ -130,16 +129,7 @@ for.body:
}
-; CHECK: [[TBAA0]] = !{[[TBAA1:.+]], [[TBAA1]], i64 0}
-; CHECK: [[TBAA1]] = !{!"double", [[TBAA2:.+]], i64 0}
-; CHECK: [[TBAA2]] = !{!"omnipotent char", [[TBAA3:.+]], i64 0}
-; CHECK: [[TBAA8]] = !{[[TBAA5:.+]], [[TBAA6:.+]], i64 0, i64 16}
-; CHECK: [[TBAA5]] = !{[[TBAA7:.+]], i64 32, !"_ZTS1A", [[TBAA6]], i64 0, i64 8, [[TBAA6]], i64 8, i64 8, [[TBAA6]], i64 16, i64 8, [[TBAA6]], i64 24, i64 8}
-; CHECK: [[TBAA7]] = !{[[TBAA3]], i64 0, !"omnipotent char"}
-; CHECK: [[TBAA6]] = !{[[TBAA7]], i64 8, !"double"}
-; CHECK: [[TBAA9]] = !{[[TBAA10:.+]], [[TBAA10]], i64 0}
-; CHECK: [[TBAA10]] = !{!"any pointer", [[TBAA2]], i64 0}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
diff --git a/llvm/test/Transforms/LoopIdiom/non-integral-pointers.ll b/llvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
index c8271306535b8..ca64ee84d989b 100644
--- a/llvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
+++ b/llvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -basic-aa -loop-idiom < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:4"
@@ -7,7 +8,19 @@ target triple = "x86_64-unknown-linux-gnu"
; they're integral pointers.
define void @f_0(i8 addrspace(3)** %ptr) {
; CHECK-LABEL: @f_0(
-; CHECK: call{{.*}}memset
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[PTR1:%.*]] = bitcast i8 addrspace(3)** [[PTR:%.*]] to i8*
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[PTR1]], i8 0, i64 80000, i1 false)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr i8 addrspace(3)*, i8 addrspace(3)** [[PTR]], i64 [[INDVAR]]
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], 10000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -30,7 +43,18 @@ for.end:
; to use any non-null pointer.
define void @f_1(i8 addrspace(4)** %ptr) {
; CHECK-LABEL: @f_1(
-; CHECK-NOT: call{{.*}}memset
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr i8 addrspace(4)*, i8 addrspace(4)** [[PTR:%.*]], i64 [[INDVAR]]
+; CHECK-NEXT: store i8 addrspace(4)* null, i8 addrspace(4)** [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], 10000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -50,7 +74,19 @@ for.end:
; Same as previous case, but vector of non-integral pointers
define void @f_2(i8 addrspace(4)** %ptr) {
; CHECK-LABEL: @f_2(
-; CHECK-NOT: call{{.*}}memset
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr i8 addrspace(4)*, i8 addrspace(4)** [[PTR:%.*]], i64 [[INDVAR]]
+; CHECK-NEXT: [[ADDR:%.*]] = bitcast i8 addrspace(4)** [[ARRAYIDX]] to <2 x i8 addrspace(4)*>*
+; CHECK-NEXT: store <2 x i8 addrspace(4)*> zeroinitializer, <2 x i8 addrspace(4)*>* [[ADDR]], align 8
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 2
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], 10000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
diff --git a/llvm/test/Transforms/LoopIdiom/scev-invalidation.ll b/llvm/test/Transforms/LoopIdiom/scev-invalidation.ll
index 2fe8a3023c4c9..ab005be2a8cb8 100644
--- a/llvm/test/Transforms/LoopIdiom/scev-invalidation.ll
+++ b/llvm/test/Transforms/LoopIdiom/scev-invalidation.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -indvars -loop-idiom < %s
; PR14214
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
@@ -13,8 +14,8 @@ for.cond: ; preds = %for.inc, %entry
%q.0 = phi i8* [ undef, %entry ], [ %q.2, %for.inc ]
%0 = load i8, i8* %p.0, align 1
switch i8 %0, label %while.cond.preheader [
- i8 0, label %for.cond4.preheader
- i8 92, label %for.inc
+ i8 0, label %for.cond4.preheader
+ i8 92, label %for.inc
]
while.cond.preheader: ; preds = %for.cond
diff --git a/llvm/test/Transforms/LoopIdiom/struct-custom-dl.ll b/llvm/test/Transforms/LoopIdiom/struct-custom-dl.ll
index a295e45be5092..8c89dbbab2814 100644
--- a/llvm/test/Transforms/LoopIdiom/struct-custom-dl.ll
+++ b/llvm/test/Transforms/LoopIdiom/struct-custom-dl.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -basic-aa -loop-idiom < %s -S | FileCheck %s
target datalayout = "e-p:40:64:64:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
@@ -12,6 +13,27 @@ target datalayout = "e-p:40:64:64:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64
; }
;}
define void @bar1(%struct.foo* %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast %struct.foo* [[F:%.*]] to i8*
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i32 [[N]], 3
+; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[F1]], i8 0, i32 [[TMP0]], i1 false)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO:%.*]], %struct.foo* [[F]], i32 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i32 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INDVARS_IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -34,9 +56,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar1(
-; CHECK: call void @llvm.memset
-; CHECK-NOT: store
}
;void bar2(foo_t *f, unsigned n) {
@@ -46,6 +65,27 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar2(%struct.foo* %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast %struct.foo* [[F:%.*]] to i8*
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i32 [[N]], 3
+; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[F1]], i8 0, i32 [[TMP0]], i1 false)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO:%.*]], %struct.foo* [[F]], i32 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i32 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INDVARS_IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -68,9 +108,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar2(
-; CHECK: call void @llvm.memset
-; CHECK-NOT: store
}
;void bar3(foo_t *f, unsigned n) {
@@ -80,6 +117,29 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar3(%struct.foo* nocapture %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar3(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr [[STRUCT_FOO:%.*]], %struct.foo* [[F:%.*]], i32 1
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = bitcast %struct.foo* [[SCEVGEP]] to i8*
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i32 [[N]], 3
+; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[SCEVGEP1]], i8 0, i32 [[TMP0]], i1 false)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[N]], [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i32 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i32 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: [[DEC:%.*]] = add i32 [[INDVARS_IV]], -1
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[DEC]], 0
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i32 [[INDVARS_IV]], -1
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_END_LOOPEXIT:%.*]], label [[FOR_BODY]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -103,9 +163,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar3(
-; CHECK: call void @llvm.memset
-; CHECK-NOT: store
}
;void bar4(foo_t *f, unsigned n) {
@@ -115,6 +172,26 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar4(%struct.foo* nocapture %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar4(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO:%.*]], %struct.foo* [[F:%.*]], i32 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: store i32 0, i32* [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i32 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: store i32 1, i32* [[B]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INDVARS_IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -137,8 +214,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar4(
-; CHECK-NOT: call void @llvm.memset
}
;void bar5(foo1_t *f, unsigned n) {
@@ -148,6 +223,26 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar5(%struct.foo1* nocapture %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar5(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO1:%.*]], %struct.foo1* [[F:%.*]], i32 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: store i32 0, i32* [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO1]], %struct.foo1* [[F]], i32 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: store i32 0, i32* [[B]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INDVARS_IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -170,8 +265,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar5(
-; CHECK-NOT: call void @llvm.memset
}
;void bar6(foo2_t *f, unsigned n) {
@@ -182,6 +275,28 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar6(%struct.foo2* nocapture %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar6(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast %struct.foo2* [[F:%.*]] to i8*
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i32 [[N]], 3
+; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[F1]], i8 0, i32 [[TMP0]], i1 false)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO2:%.*]], %struct.foo2* [[F]], i32 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO2]], %struct.foo2* [[F]], i32 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_FOO2]], %struct.foo2* [[F]], i32 [[INDVARS_IV]], i32 2
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INDVARS_IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -206,7 +321,4 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar6(
-; CHECK: call void @llvm.memset
-; CHECK-NOT: store
}
diff --git a/llvm/test/Transforms/LoopIdiom/struct.ll b/llvm/test/Transforms/LoopIdiom/struct.ll
index 5f7e1d96a855f..2f7a522b7e2be 100644
--- a/llvm/test/Transforms/LoopIdiom/struct.ll
+++ b/llvm/test/Transforms/LoopIdiom/struct.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -basic-aa -loop-idiom < %s -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
@@ -14,6 +15,29 @@ target triple = "x86_64-apple-darwin10.0.0"
; }
;}
define void @bar1(%struct.foo* %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast %struct.foo* [[F:%.*]] to i8*
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[F1]], i8 0, i64 [[TMP1]], i1 false)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO:%.*]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -37,9 +61,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar1(
-; CHECK: call void @llvm.memset
-; CHECK-NOT: store
}
;void bar2(foo_t *f, unsigned n) {
@@ -49,6 +70,29 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar2(%struct.foo* %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast %struct.foo* [[F:%.*]] to i8*
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[F1]], i8 0, i64 [[TMP1]], i1 false)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO:%.*]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -72,9 +116,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar2(
-; CHECK: call void @llvm.memset
-; CHECK-NOT: store
}
;void bar3(foo_t *f, unsigned n) {
@@ -84,6 +125,34 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar3(%struct.foo* nocapture %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar3(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[N]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
+; CHECK-NEXT: [[TMP3:%.*]] = sub i64 [[TMP0]], [[TMP2]]
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr [[STRUCT_FOO:%.*]], %struct.foo* [[F:%.*]], i64 [[TMP3]]
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = bitcast %struct.foo* [[SCEVGEP]] to i8*
+; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[TMP0]], 3
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[SCEVGEP1]], i8 0, i64 [[TMP4]], i1 false)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[TMP0]], [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[DEC:%.*]] = add i32 [[TMP5]], -1
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[DEC]], 0
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_END_LOOPEXIT:%.*]], label [[FOR_BODY]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -109,9 +178,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar3(
-; CHECK: call void @llvm.memset
-; CHECK-NOT: store
}
;void bar4(foo_t *f, unsigned n) {
@@ -121,6 +187,27 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar4(%struct.foo* nocapture %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar4(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO:%.*]], %struct.foo* [[F:%.*]], i64 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: store i32 0, i32* [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: store i32 1, i32* [[B]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -144,8 +231,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar4(
-; CHECK-NOT: call void @llvm.memset
}
;void bar5(foo1_t *f, unsigned n) {
@@ -155,6 +240,27 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar5(%struct.foo1* nocapture %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar5(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO1:%.*]], %struct.foo1* [[F:%.*]], i64 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: store i32 0, i32* [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO1]], %struct.foo1* [[F]], i64 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: store i32 0, i32* [[B]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -178,8 +284,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar5(
-; CHECK-NOT: call void @llvm.memset
}
;void bar6(foo2_t *f, unsigned n) {
@@ -190,6 +294,30 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar6(%struct.foo2* nocapture %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar6(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast %struct.foo2* [[F:%.*]] to i8*
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[F1]], i8 0, i64 [[TMP1]], i1 false)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO2:%.*]], %struct.foo2* [[F]], i64 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO2]], %struct.foo2* [[F]], i64 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_FOO2]], %struct.foo2* [[F]], i64 [[INDVARS_IV]], i32 2
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -215,7 +343,4 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar6(
-; CHECK: call void @llvm.memset
-; CHECK-NOT: store
}
diff --git a/llvm/test/Transforms/LoopIdiom/struct_pattern.ll b/llvm/test/Transforms/LoopIdiom/struct_pattern.ll
index 91cda98d50c60..56ec7d046a376 100644
--- a/llvm/test/Transforms/LoopIdiom/struct_pattern.ll
+++ b/llvm/test/Transforms/LoopIdiom/struct_pattern.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -basic-aa -loop-idiom < %s -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
@@ -17,6 +18,29 @@ target triple = "x86_64-apple-darwin10.0.0"
; }
;}
define void @bar1(%struct.foo* %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast %struct.foo* [[F:%.*]] to i8*
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
+; CHECK-NEXT: call void @memset_pattern16(i8* [[F1]], i8* bitcast ([4 x i32]* @.memset_pattern to i8*), i64 [[TMP1]])
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO:%.*]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -40,9 +64,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar1(
-; CHECK: call void @memset_pattern16
-; CHECK-NOT: store
}
;void bar2(foo_t *f, unsigned n) {
@@ -52,6 +73,29 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar2(%struct.foo* %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast %struct.foo* [[F:%.*]] to i8*
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3
+; CHECK-NEXT: call void @memset_pattern16(i8* [[F1]], i8* bitcast ([4 x i32]* @.memset_pattern.1 to i8*), i64 [[TMP1]])
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO:%.*]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -75,9 +119,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar2(
-; CHECK: call void @memset_pattern16
-; CHECK-NOT: store
}
;void bar3(foo_t *f, unsigned n) {
@@ -87,6 +128,34 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar3(%struct.foo* nocapture %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar3(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[N]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
+; CHECK-NEXT: [[TMP3:%.*]] = sub i64 [[TMP0]], [[TMP2]]
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr [[STRUCT_FOO:%.*]], %struct.foo* [[F:%.*]], i64 [[TMP3]]
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = bitcast %struct.foo* [[SCEVGEP]] to i8*
+; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[TMP0]], 3
+; CHECK-NEXT: call void @memset_pattern16(i8* [[SCEVGEP1]], i8* bitcast ([4 x i32]* @.memset_pattern.2 to i8*), i64 [[TMP4]])
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[TMP0]], [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[DEC:%.*]] = add i32 [[TMP5]], -1
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[DEC]], 0
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_END_LOOPEXIT:%.*]], label [[FOR_BODY]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -112,9 +181,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar3(
-; CHECK: call void @memset_pattern16
-; CHECK-NOT: store
}
;void bar4(foo_t *f, unsigned n) {
@@ -124,6 +190,27 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar4(%struct.foo* nocapture %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar4(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO:%.*]], %struct.foo* [[F:%.*]], i64 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: store i32 0, i32* [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO]], %struct.foo* [[F]], i64 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: store i32 1, i32* [[B]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -147,8 +234,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar4(
-; CHECK-NOT: call void @memset_pattern16
}
;void bar5(foo1_t *f, unsigned n) {
@@ -158,6 +243,27 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @bar5(%struct.foo1* nocapture %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @bar5(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[N:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_FOO1:%.*]], %struct.foo1* [[F:%.*]], i64 [[INDVARS_IV]], i32 0
+; CHECK-NEXT: store i32 1, i32* [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_FOO1]], %struct.foo1* [[F]], i64 [[INDVARS_IV]], i32 1
+; CHECK-NEXT: store i32 1, i32* [[B]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp eq i32 %n, 0
br i1 %cmp1, label %for.end, label %for.body.preheader
@@ -181,6 +287,4 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @bar5(
-; CHECK-NOT: call void @memset_pattern16
}
diff --git a/llvm/test/Transforms/LoopIdiom/unordered-atomic-memcpy-noarch.ll b/llvm/test/Transforms/LoopIdiom/unordered-atomic-memcpy-noarch.ll
index 65127c95a5113..1d8428437bbd5 100644
--- a/llvm/test/Transforms/LoopIdiom/unordered-atomic-memcpy-noarch.ll
+++ b/llvm/test/Transforms/LoopIdiom/unordered-atomic-memcpy-noarch.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -basic-aa -loop-idiom < %s -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
@@ -5,9 +6,22 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
;; Will not create call due to a max element size of 0
define void @test1(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test1(
-; CHECK-NOT: call void @llvm.memcpy.element.unordered.atomic
-; CHECK: store
-; CHECK: ret void
+; CHECK-NEXT: bb.nph:
+; CHECK-NEXT: [[BASE:%.*]] = alloca i16, i32 10000, align 2
+; CHECK-NEXT: [[DEST:%.*]] = alloca i16, i32 10000, align 2
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_0_014:%.*]] = getelementptr i16, i16* [[BASE]], i64 [[INDVAR]]
+; CHECK-NEXT: [[DESTI:%.*]] = getelementptr i16, i16* [[DEST]], i64 [[INDVAR]]
+; CHECK-NEXT: [[V:%.*]] = load atomic i16, i16* [[I_0_014]] unordered, align 2
+; CHECK-NEXT: store atomic i16 [[V]], i16* [[DESTI]] unordered, align 2
+; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[SIZE:%.*]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
bb.nph:
%Base = alloca i16, i32 10000
%Dest = alloca i16, i32 10000
diff --git a/llvm/test/Transforms/LoopIdiom/unroll-custom-dl.ll b/llvm/test/Transforms/LoopIdiom/unroll-custom-dl.ll
index 94f52f6e0f2ca..8bb5e1e9f2e36 100644
--- a/llvm/test/Transforms/LoopIdiom/unroll-custom-dl.ll
+++ b/llvm/test/Transforms/LoopIdiom/unroll-custom-dl.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -basic-aa -loop-idiom < %s -S | FileCheck %s
target datalayout = "e-p:64:64:64:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
@@ -12,6 +13,32 @@ target triple = "x86_64-apple-darwin10.0.0"
; }
;}
define void @test(i32* %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast i32* [[F:%.*]] to i8*
+; CHECK-NEXT: [[TMP0:%.*]] = shl i32 [[N:%.*]], 1
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[TMP0]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = shl i32 [[TMP2]], 3
+; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 8
+; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[F1]], i8 0, i32 [[TMP4]], i1 false)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[F]], i32 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP5:%.*]] = or i32 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[F]], i32 [[TMP5]]
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 2
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[INDVARS_IV_NEXT]], [[TMP0]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%0 = shl i32 %n, 1
%cmp1 = icmp eq i32 %0, 0
@@ -36,9 +63,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @test(
-; CHECK: call void @llvm.memset
-; CHECK-NOT: store
}
;void test_pattern(int *f, unsigned n) {
@@ -48,6 +72,32 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @test_pattern(i32* %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @test_pattern(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast i32* [[F:%.*]] to i8*
+; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[N:%.*]], 1
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[MUL]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[MUL]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[TMP0]], 1
+; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP1]], 3
+; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 8
+; CHECK-NEXT: call void @memset_pattern16(i8* [[F1]], i8* bitcast ([4 x i32]* @.memset_pattern to i8*), i32 [[TMP3]])
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[F]], i32 [[INDVARS_IV]]
+; CHECK-NEXT: [[X1:%.*]] = or i32 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[F]], i32 [[X1]]
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 2
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[INDVARS_IV_NEXT]], [[MUL]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%mul = shl i32 %n, 1
%cmp1 = icmp eq i32 %mul, 0
@@ -72,7 +122,4 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @test_pattern(
-; CHECK: call void @memset_pattern16
-; CHECK-NOT: store
}
diff --git a/llvm/test/Transforms/LoopIdiom/unroll.ll b/llvm/test/Transforms/LoopIdiom/unroll.ll
index e9fe719ca1b5f..f22fc624f1f22 100644
--- a/llvm/test/Transforms/LoopIdiom/unroll.ll
+++ b/llvm/test/Transforms/LoopIdiom/unroll.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -basic-aa -loop-idiom < %s -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
@@ -12,6 +13,33 @@ target triple = "x86_64-apple-darwin10.0.0"
; }
;}
define void @test(i32* %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast i32* [[F:%.*]] to i8*
+; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[N:%.*]], 1
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[MUL]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[MUL]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[TMP0]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 3
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP3]], 8
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[F1]], i8 0, i64 [[TMP4]], i1 false)
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[F]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[F]], i64 [[TMP5]]
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 2
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INDVARS_IV_NEXT]], [[TMP0]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%mul = shl i32 %n, 1
%cmp1 = icmp eq i32 %mul, 0
@@ -37,9 +65,6 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @test(
-; CHECK: call void @llvm.memset
-; CHECK-NOT: store
}
;void test_pattern(int *f, unsigned n) {
@@ -49,6 +74,33 @@ for.end: ; preds = %for.end.loopexit, %
; }
;}
define void @test_pattern(i32* %f, i32 %n) nounwind ssp {
+; CHECK-LABEL: @test_pattern(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[F1:%.*]] = bitcast i32* [[F:%.*]] to i8*
+; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[N:%.*]], 1
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[MUL]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[MUL]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[TMP0]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 3
+; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP3]], 8
+; CHECK-NEXT: call void @memset_pattern16(i8* [[F1]], i8* bitcast ([4 x i32]* @.memset_pattern to i8*), i64 [[TMP4]])
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[F]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[F]], i64 [[TMP5]]
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 2
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INDVARS_IV_NEXT]], [[TMP0]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%mul = shl i32 %n, 1
%cmp1 = icmp eq i32 %mul, 0
@@ -74,7 +126,4 @@ for.end.loopexit: ; preds = %for.body
for.end: ; preds = %for.end.loopexit, %entry
ret void
-; CHECK-LABEL: @test_pattern(
-; CHECK: call void @memset_pattern16
-; CHECK-NOT: store
}
diff --git a/llvm/test/Transforms/LoopIdiom/unsafe.ll b/llvm/test/Transforms/LoopIdiom/unsafe.ll
index 8eff8996adfa3..e6d91d3d04cd3 100644
--- a/llvm/test/Transforms/LoopIdiom/unsafe.ll
+++ b/llvm/test/Transforms/LoopIdiom/unsafe.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S < %s -loop-idiom | FileCheck %s
; CHECK-NOT: memset
; check that memset is not generated (for stores) because that will result
@@ -11,6 +12,27 @@
@c = external local_unnamed_addr global [1 x i8], align 1
define void @e() local_unnamed_addr {
+; CHECK-LABEL: @e(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[D0:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT: [[D1:%.*]] = load i32, i32* @b, align 4
+; CHECK-NEXT: br label [[FOR_COND1THREAD_PRE_SPLIT:%.*]]
+; CHECK: for.cond1thread-pre-split.loopexit:
+; CHECK-NEXT: br label [[FOR_COND1THREAD_PRE_SPLIT]]
+; CHECK: for.cond1thread-pre-split:
+; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[D0]], [[D1]]
+; CHECK-NEXT: br label [[FOR_BODY5:%.*]]
+; CHECK: for.body5:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_COND1THREAD_PRE_SPLIT]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY5]] ]
+; CHECK-NEXT: [[DIVX:%.*]] = sext i32 [[DIV]] to i64
+; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[DIVX]], [[INDVARS_IV]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1 x i8], [1 x i8]* @c, i64 0, i64 [[TMP0]]
+; CHECK-NEXT: store i8 0, i8* [[ARRAYIDX]], align 1
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
+; CHECK-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[TMP1]], 0
+; CHECK-NEXT: br i1 [[TOBOOL4]], label [[FOR_COND1THREAD_PRE_SPLIT_LOOPEXIT:%.*]], label [[FOR_BODY5]]
+;
entry:
%d0 = load i32, i32* @a, align 4
%d1 = load i32, i32* @b, align 4
@@ -36,6 +58,23 @@ for.body5: ; preds = %for.body5, %for.con
; udiv. SCEV expander hoists it out of the loop, so loop-idiom
; should check that the memset is not generated in this case.
define void @f(i32 %a, i32 %b, i8* nocapture %x) local_unnamed_addr {
+; CHECK-LABEL: @f(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body.loopexit:
+; CHECK-NEXT: br label [[FOR_BODY]]
+; CHECK: for.body:
+; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[DIV]] to i64
+; CHECK-NEXT: br label [[FOR_BODY6:%.*]]
+; CHECK: for.body6:
+; CHECK-NEXT: [[I_09:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY6]] ], [ 0, [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, i8* [[X:%.*]], i64 [[I_09]]
+; CHECK-NEXT: store i8 0, i8* [[ARRAYIDX]], align 1
+; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_09]], 1
+; CHECK-NEXT: [[CMP3:%.*]] = icmp slt i64 [[INC]], [[CONV]]
+; CHECK-NEXT: br i1 [[CMP3]], label [[FOR_BODY6]], label [[FOR_BODY_LOOPEXIT:%.*]]
+;
entry:
br label %for.body
diff --git a/llvm/test/Transforms/LoopIdiom/unwind.ll b/llvm/test/Transforms/LoopIdiom/unwind.ll
index a132cba164bd3..7de7d1cf73552 100644
--- a/llvm/test/Transforms/LoopIdiom/unwind.ll
+++ b/llvm/test/Transforms/LoopIdiom/unwind.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -loop-idiom < %s -S | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@@ -5,6 +6,25 @@ target triple = "x86_64-unknown-linux-gnu"
declare void @ff()
define void @test(i8* noalias nocapture %base, i64 %size) #1 {
+; CHECK-LABEL: @test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP3:%.*]] = icmp eq i64 [[SIZE:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP3]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: tail call void @ff()
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, i8* [[BASE:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store i8 0, i8* [[ARRAYIDX]], align 1
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[SIZE]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp3 = icmp eq i64 %size, 0
br i1 %cmp3, label %for.end, label %for.body.preheader
@@ -13,8 +33,6 @@ for.body.preheader: ; preds = %entry
br label %for.body
for.body: ; preds = %for.body.preheader, %for.body
-; CHECK-LABEL: @test(
-; CHECK-NOT: llvm.memset
%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
tail call void @ff()
%arrayidx = getelementptr inbounds i8, i8* %base, i64 %indvars.iv
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