[llvm] cd85ea9 - [LoongArch] Fix instruction definition

[Weining Lu via llvm-commits]

Author: wanglei
Date: 2022-04-02T18:08:29+08:00
New Revision: cd85ea943157e1b58928eddfc73f03afd4830270

URL: https://github.com/llvm/llvm-project/commit/cd85ea943157e1b58928eddfc73f03afd4830270
DIFF: https://github.com/llvm/llvm-project/commit/cd85ea943157e1b58928eddfc73f03afd4830270.diff

LOG: [LoongArch] Fix instruction definition

This patch fixes issue with the LU32I_D instruction, which did not have
an input register operand.

Differential Revision: https://reviews.llvm.org/D122970

Added: 
    

Modified: 
    llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
    llvm/test/CodeGen/LoongArch/1ri.mir

Removed: 
    


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diff  --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
index 00ea595b7646d..7f839f22459a7 100644
--- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
@@ -330,7 +330,11 @@ def ADDI_D : ALU_2RI12<0b0000001011, "addi.d", simm12>;
 def ADDU16I_D : ALU_2RI16<0b000100, "addu16i.d", simm16>;
 def ALSL_WU : ALU_3RI2<0b000000000000011, "alsl.wu", uimm2_plus1>;
 def ALSL_D  : ALU_3RI2<0b000000000010110, "alsl.d", uimm2_plus1>;
-def LU32I_D : ALU_1RI20<0b0001011, "lu32i.d", simm20>;
+let Constraints = "$rd = $dst" in {
+def LU32I_D : Fmt1RI20<0b0001011, (outs GPR:$dst),
+                       (ins GPR:$rd, simm20:$imm20),
+                       "lu32i.d\t$rd, $imm20">;
+}
 def LU52I_D : ALU_2RI12<0b0000001100, "lu52i.d", simm12>;
 def PCADDU18I : ALU_1RI20<0b0001111, "pcaddu18i", simm20>;
 def MUL_D     : ALU_3R<0b00000000000111011, "mul.d">;

diff  --git a/llvm/test/CodeGen/LoongArch/1ri.mir b/llvm/test/CodeGen/LoongArch/1ri.mir
index 571a755bed3c5..c7d74b9877567 100644
--- a/llvm/test/CodeGen/LoongArch/1ri.mir
+++ b/llvm/test/CodeGen/LoongArch/1ri.mir
@@ -29,7 +29,7 @@ body: |
 name: test_LU32I_D
 body: |
   bb.0:
-    $r4 = LU32I_D 196
+    $r4 = LU32I_D $r4, 196
 ...
 ---
 # CHECK-LABEL: test_PCADDI: