[PATCH] D116735: [RISCV] Adjust RISCV data layout by using n32:64 in layout string
Jun Sha via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 1 02:04:55 PDT 2022
joshua-arch1 updated this revision to Diff 419676.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116735/new/
https://reviews.llvm.org/D116735
Files:
clang/lib/Basic/Targets/RISCV.h
llvm/lib/IR/AutoUpgrade.cpp
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
llvm/test/CodeGen/RISCV/aext-to-sext.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D116735.419676.patch
Type: text/x-patch
Size: 6316 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220401/4af2e1ec/attachment.bin>
More information about the llvm-commits
mailing list