[PATCH] D122594: [ArgPromotion] Update min-legal-vector-width when do promotion

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

Do we have documentation for min-legal-vector-width anywhere in-tree?

I guess the hierarchy currently works like the following:

- CPU attributes control what register width codegen for a function can assume is available.
- prefer-vector-width reduces the max width of registers codegen actually uses, for the sake of avoiding vector ops that force the CPU to downclock etc.
- min-legal-vector-width makes codegen ignore prefer-vector-width, so intrinsics etc. work transparently.

Then for calls:

- If a call a function with a very wide vector argument, it's split according to prefer-vector-width/min-legal-vector-width of the caller.
- If a function definition has a very wide vector argument, it's split according to prefer-vector-width/min-legal-vector-width on that definition.

Therefore, if a function has a vector argument, the caller and the callee must have the same values of min-legal-vector-width/prefer-vector-width...?  I guess this follows from the above rules, but I'm not sure it's the final state we actually want.

I'm tempted to say we should have a separate abi-vector-width; this controls how vector arguments to functions are split, and no other function attributes have an effect.  If we have that, we can ensure the ABI is consistent without worrying about prefer-vector-width/min-legal-vector-width/target features.


Repository:
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https://reviews.llvm.org/D122594