[PATCH] D122702: [RISCV] Add CMIX isel pattern for (xor (and (xor rs1, rs3), rs2), rs3)
LiqinWeng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 29 23:06:48 PDT 2022
Miss_Grape updated this revision to Diff 419055.
Miss_Grape added a comment.
updata test
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D122702/new/
https://reviews.llvm.org/D122702
Files:
llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
llvm/test/CodeGen/RISCV/rv32zbt.ll
llvm/test/CodeGen/RISCV/rv64zbt.ll
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