[PATCH] D122653: [AMDGPU] Document the intended semantics of llvm.amdgcn.s.buffer.load
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 29 06:47:10 PDT 2022
foad updated this revision to Diff 418862.
foad added a comment.
Remove SGPR/imm comment.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D122653/new/
https://reviews.llvm.org/D122653
Files:
llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Index: llvm/include/llvm/IR/IntrinsicsAMDGPU.td
===================================================================
--- llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+++ llvm/include/llvm/IR/IntrinsicsAMDGPU.td
@@ -949,10 +949,12 @@
def int_amdgcn_buffer_load_format : AMDGPUBufferLoad<llvm_anyfloat_ty>;
def int_amdgcn_buffer_load : AMDGPUBufferLoad;
+// Generate a buffer_load instruction that may be optimized to s_buffer_load if
+// the offset argument is uniform.
def int_amdgcn_s_buffer_load : Intrinsic <
[llvm_any_ty],
[llvm_v4i32_ty, // rsrc(SGPR)
- llvm_i32_ty, // byte offset(SGPR/imm)
+ llvm_i32_ty, // byte offset
llvm_i32_ty], // cachepolicy(imm; bit 0 = glc, bit 2 = dlc)
[IntrNoMem, IntrWillReturn, ImmArg<ArgIndex<2>>]>,
AMDGPURsrcIntrinsic<0>;
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