[PATCH] D122583: MIRParser: Fix asserting with invalid flags on machine operands

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 28 06:58:04 PDT 2022


arsenm updated this revision to Diff 418577.
arsenm added a comment.

Forgot to commit style change


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122583/new/

https://reviews.llvm.org/D122583

Files:
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir
  llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir


Index: llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir
@@ -0,0 +1,12 @@
+# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -run-pass=none %s -o /dev/null 2>&1 | FileCheck %s
+---
+name:            foo
+tracksRegLiveness: true
+body:             |
+  bb.0:
+
+    ; CHECK: [[@LINE+1]]:23: cannot have a killed def operand
+    killed %0:sgpr_32 = S_MOV_B32 0
+    S_ENDPGM 0
+
+...
Index: llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir
@@ -0,0 +1,12 @@
+# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -run-pass=none %s -o /dev/null 2>&1 | FileCheck %s
+---
+name:            foo
+tracksRegLiveness: true
+body:             |
+  bb.0:
+
+    %0:sgpr_32 = S_MOV_B32 0
+    ; CHECK: [[@LINE+1]]:24: cannot have a dead use operand
+    S_ENDPGM 0, dead %0
+
+...
Index: llvm/lib/CodeGen/MIRParser/MIParser.cpp
===================================================================
--- llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -1723,6 +1723,15 @@
         RegInfo->Kind == VRegInfo::REGBANK)
       return error("generic virtual registers must have a type");
   }
+
+  if (Flags & RegState::Define) {
+    if (Flags & RegState::Kill)
+      return error("cannot have a killed def operand");
+  } else {
+    if (Flags & RegState::Dead)
+      return error("cannot have a dead use operand");
+  }
+
   Dest = MachineOperand::CreateReg(
       Reg, Flags & RegState::Define, Flags & RegState::Implicit,
       Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,


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