[PATCH] D122071: [SDAG] enable binop identity constant folds for multiplies
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 20 14:19:06 PDT 2022
RKSimon added inline comments.
================
Comment at: llvm/test/CodeGen/X86/midpoint-int-vec-128.ll:3580
ret <16 x i8> %a10
}
----------------
@lebedev.ri This code now optimizes considerably in IR: https://llvm.godbolt.org/z/edhMY1crG
Should these test cases be updated to match?
```
define <16 x i8> @vec128_i8_signed_reg_mem(<16 x i8> %a1, <16 x i8>* nocapture readonly %a2_addr) {
%a2 = load <16 x i8>, <16 x i8>* %a2_addr, align 16
%t3 = icmp slt <16 x i8> %a2, %a1
%1 = tail call <16 x i8> @llvm.smin.v16i8(<16 x i8> %a2, <16 x i8> %a1)
%2 = tail call <16 x i8> @llvm.smax.v16i8(<16 x i8> %a2, <16 x i8> %a1)
%t7 = sub <16 x i8> %2, %1
%t8 = lshr <16 x i8> %t7, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%3 = sub nsw <16 x i8> zeroinitializer, %t8
%4 = select <16 x i1> %t3, <16 x i8> %3, <16 x i8> %t8
%a10 = add nsw <16 x i8> %4, %a1
ret <16 x i8> %a10
}
declare <16 x i8> @llvm.smin.v16i8(<16 x i8>, <16 x i8>)
declare <16 x i8> @llvm.smax.v16i8(<16 x i8>, <16 x i8>)
```
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D122071/new/
https://reviews.llvm.org/D122071
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