[PATCH] D121524: [AMDGPU] use scalar shift for SALU users in frame index elimination
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 18 11:48:59 PDT 2022
rampitec added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2237
+ bool IsSALU = isSGPRClass(TII->getOpRegClass(*MI, FIOperandNum));
+ bool LiveSCC = RS->isRegUsed(AMDGPU::SCC);
+ const TargetRegisterClass *RC = IsSALU && !LiveSCC
----------------
alex-t wrote:
> rampitec wrote:
> > Is not isRegUsed for the whole function and will always return true on practice?
> This function is used to determine if SCC is live in all other places around the code.
> Another option is to scan upwards until the block start is reached.
All other places shall mean the whole function? I'd suggest using MBB->computeRegisterLiveness().
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https://reviews.llvm.org/D121524/new/
https://reviews.llvm.org/D121524
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