[PATCH] D121152: [RISCV] Add more sign-extending ops to MIR sext.w pass.

[Kito Cheng via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG7afa44f5f57e: [RISCV] Add more sign-extending ops to MIR sext.w pass. (authored by mohammed-nurulhoque, committed by kito-cheng).

Changed prior to commit:
  https://reviews.llvm.org/D121152?vs=413733&id=416443#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121152/new/

https://reviews.llvm.org/D121152

Files:
  llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
  llvm/test/CodeGen/RISCV/sextw-removal.ll

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