[PATCH] D121905: [AArch64][SVE] Fix lowering of "fcmp ueq/one" when using SVE
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 17 11:35:30 PDT 2022
paulwalker-arm added inline comments.
================
Comment at: llvm/test/CodeGen/AArch64/sve-select.ll:550-552
+; CHECK-NEXT: fcmlt p1.s, p0/z, z0.s, #0.0
+; CHECK-NEXT: fcmgt p0.s, p0/z, z0.s, #0.0
+; CHECK-NEXT: sel p0.b, p0, p0.b, p1.b
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Not the fault of this patch just observational but this looks weird now you've fixed the code generation. This comes from D119424 whereby the original `oeq` is inverted. That patch uses `getSetCCInverse` which says `Return the operation corresponding to !(X op Y)`.
Perhaps I've got my logic wrong but I think `!(X oeq Y)` => `X une Y` whereas this output clearly shows we're getting `X one Y`. What do you think @david-arm is my logic silly? or is there a potential bug to investigate?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D121905/new/
https://reviews.llvm.org/D121905
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