[PATCH] D121874: [AMDGPU] Fix PreRARematerialize scheduler pass sinking undef instruction

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In D121874#3390011 <https://reviews.llvm.org/D121874#3390011>, @vangthao wrote:

> Skip all defs containing subregs instead of just undefs.

Also retitle the change.



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Comment at: llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp:809
     NewLiveIns[Reg] = LaneBitmask::getNone();
-    TII->reMaterialize(*InsertPos->getParent(), InsertPos, Reg,
-                       Def->getOperand(0).getSubReg(), *Def, *TRI);
+    TII->reMaterialize(*InsertPos->getParent(), InsertPos, Reg, 0, *Def, *TRI);
     MachineInstr *NewMI = &*(--InsertPos);
----------------
I would still pass the subreg here. It will be always 0, but not passing it 'spaghettifies' code.


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https://reviews.llvm.org/D121874