[PATCH] D121914: [AMDGPU] Stop using getMinimalPhysRegClass in LowerFormalArguments

Thu Mar 17 08:06:45 PDT 2022

foad added a comment.

In D121914#3389338 <https://reviews.llvm.org/D121914#3389338>, @Joe_Nash wrote:

> Is this passing testing?

Yes.

> When I put assert(VT.getSizeInBits() == 32) here I get massive test failures. So what happens to wider types, they all become VGPR_32?

See the calling conv definitions in AMDGPUCallingConv.td. All supported types (including i16 and f16) are passed in 32-bit GPRs, either VGPRn or SGPRn.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121914/new/

https://reviews.llvm.org/D121914