[PATCH] D121774: [RISCV] support fcmp in zfinx,zdinx,zhinx

QIHAN CAI via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 16 04:39:31 PDT 2022


realqhc updated this revision to Diff 415781.
realqhc added a comment.

[RISCV] revert target-abi test and abi error string format


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121774/new/

https://reviews.llvm.org/D121774

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrFormats.td
  llvm/lib/Target/RISCV/RISCVInstrInfoD.td
  llvm/lib/Target/RISCV/RISCVInstrInfoF.td
  llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
  llvm/test/CodeGen/RISCV/double-fcmp.ll
  llvm/test/CodeGen/RISCV/float-fcmp.ll
  llvm/test/CodeGen/RISCV/half-fcmp.ll

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