[PATCH] D121675: [RISCV] Add pattern for vnsrl.wi and vnsra.wi instructions

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 15 08:35:43 PDT 2022


frasercrmck added inline comments.
Herald added a subscriber: arichardson.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:813
 // 12.7. Vector Narrowing Integer Right Shift Instructions
 defm : VPatBinarySDNode_V_WV<srl, "PseudoVNSRL">;
 defm : VPatBinarySDNode_V_WX<srl, "PseudoVNSRL">;
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It feels to me like we should just have one `VPatBinarySDNode_V_WV_WX_WI` since the individual WV, WX, and WI patterns are only ever used in conjunction with one another.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121675/new/

https://reviews.llvm.org/D121675



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