[llvm] 8cbf18c - [GlobalISel] Fix store merging incorrectly merging volatile stores.

[Amara Emerson via llvm-commits]

Author: Amara Emerson
Date: 2022-03-14T13:48:51-07:00
New Revision: 8cbf18cb049d71fc15e7b569c45ae4bde54d191c

URL: https://github.com/llvm/llvm-project/commit/8cbf18cb049d71fc15e7b569c45ae4bde54d191c
DIFF: https://github.com/llvm/llvm-project/commit/8cbf18cb049d71fc15e7b569c45ae4bde54d191c.diff

LOG: [GlobalISel] Fix store merging incorrectly merging volatile stores.

The existing volatile checks only handle aliasing hazards between stores,
but that isn't enough since by that point volatile stores may have already
been added to the current candidate group.

Added: 
    

Modified: 
    llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/store-merging.ll

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
index de8dbd4569016..0e56c781047a7 100644
--- a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
@@ -508,6 +508,12 @@ bool LoadStoreOpt::addStoreToCandidate(GStore &StoreMI,
   if (StoreMI.getMemSizeInBits() != ValueTy.getSizeInBits())
     return false;
 
+  // Avoid adding volatile or ordered stores to the candidate. We already have a
+  // check for this in instMayAlias() but that only get's called later between
+  // potential aliasing hazards.
+  if (!StoreMI.isSimple())
+    return false;
+
   Register StoreAddr = StoreMI.getPointerReg();
   auto BIO = getPointerInfo(StoreAddr, *MRI);
   Register StoreBase = BIO.BaseReg;

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/store-merging.ll b/llvm/test/CodeGen/AArch64/GlobalISel/store-merging.ll
index 233de589daeeb..e7382204ceae7 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/store-merging.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/store-merging.ll
@@ -281,3 +281,36 @@ define i32 @test_alias_allocas_2xs32(i32 *%ptr) {
   store i32 5, i32 *%addr2
   ret i32 %ld
 }
+
+define void @test_volatile(i32 **%ptr) {
+; CHECK-LABEL: test_volatile:
+; CHECK:       ; %bb.0: ; %entry
+; CHECK-NEXT:    ldr x8, [x0]
+; CHECK-NEXT:    str wzr, [x8]
+; CHECK-NEXT:    str wzr, [x8, #4]
+; CHECK-NEXT:    ret
+entry:
+  %0 = load i32*, i32** %ptr, align 8
+  store volatile i32 0, i32* %0, align 4;
+  %1 = bitcast i32** %ptr to i8**
+  %add.ptr.i.i38 = getelementptr inbounds i32, i32* %0, i64 1
+  store volatile i32 0, i32* %add.ptr.i.i38, align 4
+  ret void
+}
+
+define void @test_atomic(i32 **%ptr) {
+; CHECK-LABEL: test_atomic:
+; CHECK:       ; %bb.0: ; %entry
+; CHECK-NEXT:    ldr x8, [x0]
+; CHECK-NEXT:    add x9, x8, #4
+; CHECK-NEXT:    stlr wzr, [x8]
+; CHECK-NEXT:    stlr wzr, [x9]
+; CHECK-NEXT:    ret
+entry:
+  %0 = load i32*, i32** %ptr, align 8
+  store atomic i32 0, i32* %0 release, align 4;
+  %1 = bitcast i32** %ptr to i8**
+  %add.ptr.i.i38 = getelementptr inbounds i32, i32* %0, i64 1
+  store atomic i32 0, i32* %add.ptr.i.i38 release, align 4
+  ret void
+}