[PATCH] D121491: [AMDGPU] Restrict machine copy propagation from creating unaligned classes

Sat Mar 12 01:02:14 PST 2022

rampitec added inline comments.

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Comment at: llvm/test/CodeGen/AMDGPU/mcp-aligned-vgprs.mir:12
+    renamable $vgpr0_vgpr1 = V_PK_MUL_F32 0, $sgpr0_sgpr1, 0, 0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
+    renamable $vgpr3_vgpr4 = COPY killed renamable $vgpr0_vgpr1
+    S_ENDPGM 0, implicit $vgpr3_vgpr4
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cdevadas wrote:
> Why does such a copy exist in the first place?
> The register pair given for 64-bit Dst operand of COPY itself is unaligned. 
> One situation I can imagine is when the Dst is the odd subpart of a higher tuple. 
> But in that case, shouldn't that info be given in the instruction as an implicit operand?
This is RA created copy of vreg_96:sub1_sub2. A perfectly valid and aligned case.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121491/new/

https://reviews.llvm.org/D121491