[PATCH] D121491: [AMDGPU] Restrict machine copy propagation from creating unaligned classes

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 11 20:30:20 PST 2022


rampitec marked 2 inline comments as done.
rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:4774
+  const TargetRegisterClass *RC = RI.getRegClass(RCID);
+  if (RC && ST.needsAlignedVGPRs()) {
+    unsigned Size = RI.getRegSizeInBits(*RC);
----------------
arsenm wrote:
> arsenm wrote:
> > rampitec wrote:
> > > arsenm wrote:
> > > > Why can't you just select the aligned class above to begin with?
> > > This is only VGPRs, and not all VGPRs. Then it will use a condition at every case, while the code below is still needed.
> > I don't think RC can be null here
> I don't understand. What do you mean not all VGPRs? You need the aligned class or not?
RC can be null here and it does for many tests.

The switch above only covers AV and only certain sizes. It does not cover neither vgprs nor agprs. The very first test I have added would not pass because it uses VReg_64.


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https://reviews.llvm.org/D121491



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