[PATCH] D121491: [AMDGPU] Restrict machine copy propagation from creating unaligned classes

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:4774
+  const TargetRegisterClass *RC = RI.getRegClass(RCID);
+  if (RC && ST.needsAlignedVGPRs()) {
+    unsigned Size = RI.getRegSizeInBits(*RC);
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rampitec wrote:
> arsenm wrote:
> > Why can't you just select the aligned class above to begin with?
> This is only VGPRs, and not all VGPRs. Then it will use a condition at every case, while the code below is still needed.
I don't think RC can be null here


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Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:4774
+  const TargetRegisterClass *RC = RI.getRegClass(RCID);
+  if (RC && ST.needsAlignedVGPRs()) {
+    unsigned Size = RI.getRegSizeInBits(*RC);
----------------
arsenm wrote:
> rampitec wrote:
> > arsenm wrote:
> > > Why can't you just select the aligned class above to begin with?
> > This is only VGPRs, and not all VGPRs. Then it will use a condition at every case, while the code below is still needed.
> I don't think RC can be null here
I don't understand. What do you mean not all VGPRs? You need the aligned class or not?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121491/new/

https://reviews.llvm.org/D121491